Professor Zhong Lin Wang at Georgia Tech has been championing his work in exploiting the piezoelectric qualities of zinc oxide nanowires for years now with his so-called "nanogenerators".

Now researchers at the Korea Advanced Institute of Science and Technology (KAIST) have taken up the mantle of Wang’s work by creating a piezoelectric “nanogenerator” more easily and cheaply than ever before.

The research, which was initially published in the Wiley journal Advanced Materials, produced a piezoelectric nanocomposite through relatively simple processes such as spin-casting and the bar-coating method. So this new generation of “nanogenerators” is not restricted by a complicated and high-cost process or even size.

Even Wang himself is impressed by this work. “This exciting result first introduces a nanocomposite material into the self-powered energy system, and therefore it can expand the feasibility of nanogenerator in consumer electronics, ubiquitous sensor networks, and wearable clothes," says Wang.

The lead researcher on this project, Keon Jae Lee, a Professor at the Department of Materials Science and Engineering at KAIST, has a comprehensive website that covers much of the work.

One of the videos from that website (below) manages to demonstrate just how uncomplicated the process is to create this nanocomposite and shows how it works in generating an electric charge from the movement of a finger.

While Wang has been expert at getting this research into the media, it hasn't yet found itself in commercial products. It should be interesting to see if these manufacturing simplifications and cost reductions will help push this technology into consumer electronics where Wang always envisioned it could be.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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