Memory and storage chip maker Micron Technology says it is shipping samples of the most bit-dense DRAM memory chips yet. Compared with its own previous generation, the 16-gigabit DRAM chip is 15 percent more power efficient and 35 percent more dense. Notably, Micron achieved the improvement without resorting to the most advanced chip-making technology, extreme ultraviolet lithography. The features that make up DRAM cells are not nearly as tiny as those on logic chips, but this advance shows that DRAM density could still shrink further in the future.
Micron says it is shipping samples of LPDDR5X chips, memory made for power-constrained systems such as smartphones. (LPDDR5X, unpacked: a revved-up twist on the low-power version of the fifth generation of the double-data-rate memory communications standard, capable of transferring 8.5 gigabits per second.) It’s the first chip made using Micron’s new manufacturing process, called 1-beta, which the company says maintains the lead it took a year ago over rivals, including Samsung and SK Hynix.
Manufacturing processes for DRAM and logic chips diverged decades ago, with logic chips shrinking transistors much more aggressively as the years went by, explains Jim Handy, a memory and storage analyst at Objective Analysis, in Los Gatos, Calif. The reason for the difference has to do with DRAM’s structure. DRAM stores a bit as charge in a capacitor. Access to each capacitor is gated by a transistor. But the transistor is an imperfect barrier, and the charge will eventually leak away. So DRAM must be periodically refreshed, restoring its bits before they drain away. In order to keep that refresh period reasonable while still increasing the density of memory, DRAM makers had to make some pretty radical changes to the makeup of the capacitor. For Micron and other major manufacturers, it now resembles a tall pillar and is made using materials not found in logic chips.
Nevertheless, memory makers have been investing in the latest key manufacturing tool that logic-chip companies have: extreme ultraviolet lithography. But Micron didn’t need it to achieve its latest chip. Instead, the company used a proprietary version of “multipatterning” technology while sticking with the long-established 193-nanometer immersion lithography. Multipatterning involves cycles of projecting a pattern, etching and depositing material, then projecting another pattern—done in such a way that the interaction produces finer structures than any single pattern could. This version of multipatterning was adapted from one used in Micron’s NAND flash business, according to Thy Tran, vice president of DRAM process integration at Micron. “We have taken that and extended it aggressively,” she says. “It’s extremely valuable to be able to leverage both DRAM and NAND [flash].”
Not needing to use EUV is “a real coup,” says Handy. But it follows a trend. “Micron, for over a decade, has been able to use older process technology and equipment smarter than everybody else.”
A 16-gigabit DRAM die made with Micron’s 1-beta technology.Micron Technology
Tran says the company currently believes it will begin using EUV with the next process, 1-gamma.
The initial product is meant for mobile systems, and so it makes power saving a priority. Part of that comes from the use of “enhanced” dynamic voltage and frequency scaling. This is technology that allows a chip to run with a slower clock and at lower voltage to conserve energy and then ramp up to higher frequency and voltage to get more work done. Micron’s previous manufacturing technology, 1-alpha, could transfer data at 1,600 megabits per second when in the power-saving mode, explains Ross Dermott, vice president of mobile product line management. The LPDDR5X DRAM, made using the 1-beta process, can operate at 3,200 Mb/s in the low-power condition. Handset makers that “have features or applications that are running at that faster speed, can go into [the low-power] mode and essentially further reduce the power consumption,” he says.
Tran says that Micron will later use 1-beta to make other types of DRAM, including the high-bandwidth memory that powers data-center processors and AI accelerators.
This post was corrected on 3 November. Micron's vice president of mobile product line management is Ross Dermott, not Ross McDermott.
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Samuel K. Moore is the senior editor at IEEE Spectrum in charge of semiconductors coverage. An IEEE member, he has a bachelor's degree in biomedical engineering from Brown University and a master's degree in journalism from New York University.