Stick-on Displays: Bendy 2D Semiconductor is Fast Enough to Drive OLED Pixels

Engineers in South Korea have fixed molybdenum disulfide’s electronic problems to bring flexible displays closer

3 min read
Photographic image of ultrathin AM-OLED display on the human wrist
Photo: School of Electrical and Electronic Engineering, Yonsei University

One of the great things about 2D semiconductors like molybdenum disulfide is that they bend easily. They also allow electrons to zip through them pretty quickly. And, unsurprisingly, since they are only about an atom thick, they are transparent. That combination makes them perfect for flexible OLED displays.

However, if display makers try to build MoS2 into transistors needed to control OLED pixels, the resistance between the MoS2 and the transistors’ source and drain electrodes is so high that it puts the 2D wonder material out of contention for the job.

But now, engineers in South Korea have come up with a way to build MoS2 transistors that can work in bendable OLED displays. They used the transistors to construct a simple 6 x 6-pixel array on a 7 micrometer-thick plastic sheet you can stick on your skin. The display is so flexible it could be repeatedly bent to a radius smaller than one millimeter without breaking.

“Carrier mobility” is the key property they had to engineer, explains Jong-Hyun Ahn a flexible electronics expert at Yonsei University, in Seoul. It’s a measure of how quickly charge moves through a semiconductor. For example, the kind of crystalline silicon most chips are made from has an electron mobility of 1400 cm2/V-s. The semiconductor that makes up a display’s backplane, the system that turns pixels on or off or changes their brightness, must have a minimum carrier mobility in order to drive enough current to operate the pixel, and do it quickly enough to meet video rates. “In the case of conventional LCDs, [the backplane] can be operated with low carrier mobility amorphous silicon,” which has an electron mobility of about 1 cm2/V-s, says Ahn. But OLEDs need more. OLED display makers such as LG and Samsung use higher mobility materials such as polycrystalline silicon (>10 cm2/V-s) and oxide semiconductors. But these “are quite rigid and brittle,” Ahn says. They can be bent some, but not repeatedly.

Schematic of high-mobility MoS2 TFT using an Al2O3 passivation layer. A transistor made from molybdenum disulfide is sandwiched between two layers of aluminum oxide. The device exhibits high carrier mobility, important for driving current to the pixels of an OLED display. Illustration: School of Electrical and Electronic Engineering, Yonsei University

To make a superthin flexible OLED display, Ahn and his team needed to free MoS2 from the resistances that were holding it back. “Contact resistance between MoS2 and the transistor electrode is very high,” he says. “And that reduced the carrier mobility of MoS2 transistors.”

The key was in recognizing how easily influenced the 2D semiconductor is by the materials around it. Instead of building the transistor on a silicon dioxide surface, as is usually done, Ahn’s team used a surface whose smoothness they could more easily control. They wound up sandwiching the transistor within two layers of a dielectric, aluminum oxide (AlO3).

The interface between AlO3 and MoS2 has the peculiar effect of essentially enriching the semiconductor with electrons, similar to the way silicon is doped with chemicals to make it a semiconductor. This enhancement overcame the contact resistance problem, boosting the charge carrier mobility. What’s more, the dielectric’s smoothness prevented the formation of spots where charge can become trapped, improving mobility further to between 17 and 20 cm2/V-s.

Ahn and his team now want to produce a smartwatch or smartphone-size flexible display. They reported their invention this week in Science Advances.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
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A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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