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Adhesion Capability of Graphene Opens New Application Possibilities

Graphene's flexibility makes it stick to the smoothest of surfaces

1 min read
Adhesion Capability of Graphene Opens New Application Possibilities

Researchers at the University of Colorado, Boulder, have discovered that graphene possesses unexpected adhesion qualities that could open it to use in new, graphene-based mechanical devices such as gas separation membranes. 

Assistant Professor Scott Bunch of the CU-Boulder mechanical engineering department, along with graduate students Steven Koenig and Narasimha Boddeti and Professor Martin Dunn, published in the August 14 edition of Nature Nanotechnology their discovery that graphene’s flexibility and its strong influence to van der Waals force make it stick to even the smoothest surfaces.

"The real excitement for me is the possibility of creating new applications that exploit the remarkable flexibility and adhesive characteristics of graphene and devising unique experiments that can teach us more about the nanoscale properties of this amazing material," Bunch said.

The experiment ran a so-called “blister test”—essentially, adhesion energy tests—on one to five layers of graphene after it had been placed on a glass substrate. The results showed that the adhesion energies between graphene and the glass substrate were several orders of magnitude higher than those found in typical micromechanical structures (0.45 ± 0.02 J m−2 for monolayer graphene and 0.31 ± 0.03 J m−2 for samples containing two to five graphene sheets).

I understand that these adhesion properties of graphene bode well for membranes for natural gas processing or water purification, and it seems a good line of research to find uses of graphene that would seemingly avoid its inherent weakness of lacking a band gap.

It will be interesting to see what other possible applications people recognize in this new adhesion quality outside of mechanical membrane technologies.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD

A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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