A 0.07-Second Power Problem at Toshiba Chip-Plant May Affect Digital Device Availability/Prices

Toshiba says power interruption means 20% reduced NAND flash memory chip shipments for next two months

2 min read
A 0.07-Second Power Problem at Toshiba Chip-Plant May Affect Digital Device Availability/Prices

There was a Wall Street Journal news story (among others) this morning reporting that "there was a sudden drop in voltage that caused a 0.07-second power interruption at Toshiba'sYokkaichi memory-chip plant in Mie prefecture" causing a problem which Toshiba said will reduce its shipments of NAND flash memory by 20% for the next two months. This, the Journal article says, would translate into a 7.5% reduction in world-wide shipments through February.

NAND memory is used in everything from USB flash drives to MP3 players to digital cameras to smartphones and tablet PCs.

According to the WSJ, Toshiba is the second largest supplier of NAND flash memory, with 35.4% of the world's market. Samsung is the leader with 39.8% of the market.

The WSJ article also says that apparently the uninterruptible power supply system at the Toshiba plant failed when the region was hit by a drop in voltage, causing the chips being fabricated to be ruined. Toshiba's press release dated today says:

"Toshiba Corporation has announced that Yokkaichi Operations, the company's memory production facility in Mie prefecture, returned to close to 100% normal operation at 15:00 on December 10. This marks the recovery from the stoppage of part of the facility's fabrication equipment caused by a momentary drop in voltage at 5:21AM on December 8."

"Toshiba is currently confirming the impact of this incident and will seek to minimize impacts on its customers."

There is some debate about whether the reduction in NAND flash memory chips availability will mean short-term price increases and device shortages, and if so, by how much. Some analysts don't expect Apple to be affected much if at all, and some others expect Samsung to pick up the slack in chip availability. Holiday supplies of devices using the chips are not likely to be affected, although it may mean that post-holiday price discounting of unsold digital devices may not be as aggressive as in the past.

However, if you are looking for any excuse to use to buy that digital device you wanted sooner rather than later, this incident may be a sufficient one to help rationalize your decision.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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