An additional benefit of a tool that scales across processors, FPGAs, and I/O is the ability to describe the entire system, including the interactions between components within a single tool. Consequently, this enables full system simulations with substantially less effort, as designers don’t need to stitch simulations across tools to estimate and understand how a system might behave.
1. System Design and Management
LabVIEW Communications offers an ability to set up, organize, and manage your system in a feature called SystemDesigner. It primarily provides a graphical representation of your hardware system and enables intuitive configuration, software organization, deployment, and documentation. By consolidating these various functions into the development environment, it becomes a starting point for your development and a hub for hardware configuration.
The driver information, the hardware documentation, the software targeted to run on a specific hardware are all one click away from SystemDesigner to better manage your system.
2. Multiple Language Support
Although LabVIEW Communications works with a variety of design languages and approaches, including C, MATLAB®, VHDL, and dataflow, the graphical dataflow language can span both the processor and FPGA seamlessly. The advanced compiler technology within LabVIEW Communications optimizes and handles the mapping of the G dataflow language to the underlying processing component—whether it’s a processor or an FPGA. This provides designers considerable flexibility in experimenting with design partitioning as they can seamlessly move an algorithm or components of an algorithm between the FPGA and the processor.
3. Multiple Hardware Support
To ensure a seamless transition of algorithms designed in G between processor and FPGA hardware, LabVIEW Communications also provides built-in tools for data-driven float-to-fixed point conversion. Furthermore, the performance optimizations on the implementation are specific to the underlying hardware. For example, for a diagram targeted to the processor, LabVIEW Communications can properly parallelize and partition a design to automatically use the full potential of a multicore processor. If a deterministic execution of such code is needed for a specific application, simply change the hardware target to NI Linux Real-Time without rewriting the code. And for a diagram targeted to the FPGA, it can accept various user-specified constraints like throughput and clock rate to properly synthesize a hardware design on the FPGA fabric.
Overall, this ability to quickly partition the design and rapidly iterate on the ideal implementation is possible with only LabVIEW Communications as it offers access to both the FPGA and processor. As such, without the hardware integration available in the tool, such design flexibility would be nearly impossible to realize. The benefit to users is the ability to better characterize a design and to truly understand design trade-offs, which can motivate further refinements. As legions of researchers join the fray to define the next generations of communications standards, tools that enable efficient, rapid innovation on quality SDR systems are essential in the race to deliver the next disruptive solution to market. It’s no surprise then that LabVIEW Communications System Design Suite and NI SDR hardware are already in the arsenals of those leading the marketplace.
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- Learn more about how LabVIEW can help you design a wireless communications system
The registered trademark Linux® is used pursuant to a sublicense from LMI, the exclusive licensee of Linus Torvalds, owner of the mark on a worldwide basis. MATLAB® is a registered trademark of The MathWorks, Inc.