New Method Developed for Making a Transistor from Graphene

German and Swedish researchers add new steps to making graphene transistors from silicon carbide

2 min read
New Method Developed for Making a Transistor from Graphene

 

Researchers from Germany and Sweden have developed a new method for creating a transistor from graphene, according to an artlcle at Phys.org.

The headline, "Researchers devise a way to create a graphene transistor," is a bit misleading. Researchers have been making transistors out of graphene for some time now,  and have been using a process based on silicon carbide, like the German-Swedish research. 

The real breakthrough for this latest line of research, which was published 17 July in the journal Nature Communications (“Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics”),  appears to be how they engineered all the constituent parts of the transistor.

To be honest, I am not entirely clear on how even their process diverges drastically from the IBM research. After a year of trying to figure out how to connect all the parts of the graphene-based transistor without damaging it, the IBM team used electron beam lithography and a resist that was sensitive to electrons.The German-Swedish researchers used electron beam lithography too.

Maybe the difference between the two is the use of oxygen plasma etching, which converted the middle channel on the transistor from a contact into a gate. This could be the “tailoring the graphene/silicon carbide interface” of which the paper title speaks.

An important caveat to the research is that because the researchers had to scale up dramatically their transistor they don’t really know how much faster the transistor might be than the current variety. Furthermore, they’re not even sure how fast it might be when they scale the transistor down.

I am sure this work is helpful and evolutionary research in the development of graphene transistors, but I think maybe the Phys.org article has perhaps overstated its case when it says that this research “is the breakthrough computer engineers have been waiting for.”

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Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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