As far back as 2007 in the ITRS roadmap, the use of block copolymers has been targeted for reducing chip size. Since then they have been used to push the possibilities of self-assembled photoresists as well as improve insulation within chips.
During this period, researchers at CRANN, the nanoscience institute based at Trinity College Dublin—which partners with University College Cork (UCC)—along with researchers from the University of Wisconsin and Intel’s Researchers in Residence based in CRANN—namely, Professor Mick Morris of UCC—have been characterizing the block copolymer to better understand its self-assembling properties.
The results from the research, which were published in the journal Nanoscale, has demonstrated a method for fabricating large-area arrays of silicon nanowires through directed self-assembly of block copolymer nanopatterns that can be easily integrated into current manufacturing techniques.
In a press release issued by the Science Foundation of Ireland, Morris commented, “The potential of our research is extremely exciting and reflects many years of hard work. This is the first time that anyone has demonstrated that large areas of nano-electronic devices can be developed in this fashion and highlights a pathway to commercial applications. I am looking forward to exploring commercial opportunities to further advance our work.”
Those associated with the project believe that the development could revolutionize the manufacturing of silicon chips and lead to a new generation of computers and real-time 3D video processing.
These types of claims are pretty regular in press releases covering this kind of research. In this case, however, given how deeply involved Intel was in the research one can’t help but give it a bit more credence than usual.
Dexter Johnson is a contributing editor at IEEE Spectrum, with a focus on nanotechnology.
