Let's Make the Entire Chip from Graphene

Novel design proposes a solution to interconnect problems in shrinking chips by making every component from graphene

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Let's Make the Entire Chip from Graphene
Illustration: UCSB Nanoelectronics Research Lab

The International Technology Roadmap for Semiconductors (ITRS) predicts that by 2015, copper-based vias that connect the silicon surface to a chips' wiring and connect one layer of wiring to another simply will not be able to do the job anymore. That day is a little over a year away—practically tomorrow in technological innovation terms. As a result, there is a bit of a scramble to find alternatives—not just for vias but for all sorts of interconnects used in integrated circuits (ICs).

Researchers at the University of California, Santa Barbara (UCSB) have taken an initial step in offering one possible alternative: “an integrated circuit design scheme in which transistors and interconnects are monolithically patterned seamlessly on a sheet of graphene.”

It’s been over 30 months since IBM demonstrated that it could make an integrated circuit using graphene; in this most recent research, the UCSB team demonstrated, using a computer model, that its design is feasible.  So where is the disconnect (pun intended)?

The IBM work involved a graphene field-effect transistor and inductor and other circuit components that were monolithically integrated on a single silicon wafer. The UCSB design proposes that every bit of the IC be made from graphene.

"In addition to its atomically thin and pristine surfaces, graphene has a tunable band gap, which can be adjusted by lithographic sketching of patterns—narrow graphene ribbons can be made semiconducting while wider ribbons are metallic,” explained Kaustav Banerjee, professor of electrical and computer engineering and director of the Nanoelectronics Research Lab at UCSB, in a press release. “Hence, contiguous graphene ribbons can be envisioned from the same starting material to design both active and passive devices in a seamless fashion and lower interface/contact resistances."

In the paper that was published in the journal Applied Physics Letters (“Proposal for all-graphene monolithic logic circuits”) the researchers demonstrate “that devices and interconnects can be built using the 'same starting material'—graphene.” While that is intriguing, what may really garner the interest of the semiconductor industry is the research paper's claim that, “all-graphene circuits can surpass the static performances of the 22-[nanometer] complementary metal-oxide-semiconductor devices.”

Commenting on the research, Professor Philip Kim at Columbia University noted: "This work has demonstrated a solution for the serious contact resistance problem encountered in conventional semiconductor technology. [It presents the] innovative idea of using an all-graphene device-interconnect scheme. This will significantly simplify the IC fabrication process of graphene based nanoelectronic devices."

Illustration: UCSB Nanoelectronics Research Lab

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