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Watch: Laser Origami Makes Inductors

Army researchers use a common laser engraver to make inductors and other complex shapes

2 min read
Laser created 12-turn toroid, cut and folded in the process.
Photo: U.S. Army Research Laboratory/IEEE

In research reported in an upcoming issue of IEEE Electron Device Letters, researchers at the U.S. Army Research Laboratory, in Adelphi, Md., show how they can make three-dimensional inductors by using a laser to both cut and fold copper. The Army is interested in origami inductors because the technology could give deployed soldiers the ability to make replacement parts rather than rely on what could be a risky and expensive delivery. But never mind its practical purpose; the process is just absolutely mesmerizing to watch.

The laser origami technique exploits a phenomenon called counterbending. Using the laser at half power (10 watts) and rapid scanning (100 millimeters per second), the laser heats a spot to be bent. Because of the low power and brief blast, only one side of the copper gets hot. That side temporarily expands, bending away from the laser and producing permanent strain in the cooler, opposite side. When the hot spot contracts again, the strain bends the copper back up toward the laser, folding the copper permanently.

Compared to commercial inductors from Coilcraft that have about the same inductances, the laser-origami components rang in with similar quality factors. (Quality factor is a dimensionless quantity that tells how awesome your inductor is.) 

Here, the Army team—Nathan Lazarus, Sarah S. Bedair, and Gabriel L. Smith—are building a planar inductor, which requires a bit of conductor to protrude into the third dimension. It’s about 20 millimeters on a side, and the process took about 12 minutes, so the video is sped up.

Here, they’re building a toroidal inductor, which is about as 3D as you get. It has an outer diameter of 34 mm, and inductance of 159 nanohenries. Don’t you wish they’d set these to music?

Thanks to Nathan Lazarus for the videos. You can see some of the other stuff he and his colleagues made here.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD

A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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