The July 2022 issue of IEEE Spectrum is here!

Close bar

Quantum Crypto Crams Into System-on-a-Chip

Toshiba reports the first photonic chip to deliver full-stack quantum key distribution

2 min read
A Toshiba scientist examines a QKD chip under the microscope at the company’s Cambridge Research Laboratory

A Toshiba scientist examines a quantum key distribution (QKD) chip under the microscope at the company's Cambridge Research Laboratory.

Toshiba Europe Ltd

Scientists at Toshiba have developed a photonic chip system capable of virtually uncrackable quantum communications, with enough performance to secure video calls over metropolitan distances and enough stability to continuously operate for days, a new study finds.

Quantum computers under development worldwide can theoretically break the encryption techniques currently used for secure communications. To counter this threat, scientists around the globe are developing quantum cryptography technology to withstand such attacks.

Encryption depends on a sender and receiver sharing a key that decrypts a message's contents. With quantum key distribution, the sender and receiver share random secret keys encoded in particles, usually pairs of photons created at the same time. Each photon is linked or "entangled" with its partner, so any potential eavesdropper seeking to intercept these keys would alter their data in ways that both the sender and receiver can detect. Toshiba estimates the market for quantum key distribution is expected to grow to roughly $20 billion worldwide by 2035.

Previous research had integrated quantum transmitters and receivers onto photonic chips. However, Toshiba noted this earlier work had not also incorporated the quantum random number generators needed to prove the keys in these encryption systems were truly unpredictable and thus secure.

Toshiba's chips can now deliver quantum secure keys at 470,000 bits per second.

"Up to now, demonstrations of photonic integrated circuits for quantum key distribution were limited to single components—quantum key distribution transmitters, quantum key distribution receivers or quantum random number generators," says study lead author Taofiq Paraïso, a research scientist at Toshiba Europe's Cambridge Research Laboratory in England.

Now Paraïso and his colleagues have created a secure quantum communication system that combines quantum transmitter and receiver microchips with a chip-based quantum random number generator that operates at a rate of 4 billion bits per second. In experiments, "the system was shown to operate over metropolitan fiber lengths and sustain high performance over several days without the need of any user intervention," Paraïso says.

At distances of 10 kilometers, the scientists achieved key generation rates of about 470,000 bits per second over roughly five days, good enough to secure video calls. At distances of 50 kilometers, they achieved rates of about 28,000 bits per second over roughly 12 hours.

All these photonic chips were manufactured using conventional semiconductor processes, which Toshiba notes can help lead to mass deployment of quantum communications. These semiconductor circuits were also much smaller and lighter than the fiber-optic counterparts typically used in quantum key distribution, and consume less power as well.

The researchers showed they could assemble their system into compact 1U rackmount cases, the kind seen in servers. The chips are packaged into C form-factor pluggable-2 (CFP2) modules, a widespread format in high-speed telecommunications. The scientists also demonstrated they could interface their system with a commercial industrial-grade encryptor, allowing secure data transfer with up to 100 billion bits per second.

The photons in the system are detected using single-photon detectors, and Paraïso notes that in this study, they did not integrate these sensors onto chips. "While this does not hinder going to the market, an on-chip single photon detector will further reduce the cost and overall footprint of the systems," he says.

The scientists detailed their findings online Oct. 21 in the journal Nature Photonics.

The Conversation (0)
Twenty people crowd into a cubicle, the man in the center seated holding a silicon wafer full of chips

Intel's million-transistor chip development team

In San Francisco on Feb. 27, 1989, Intel Corp., Santa Clara, Calif., startled the world of high technology by presenting the first ever 1-million-transistor microprocessor, which was also the company’s first such chip to use a reduced instruction set.

The number of transistors alone marks a huge leap upward: Intel’s previous microprocessor, the 80386, has only 275,000 of them. But this long-deferred move into the booming market in reduced-instruction-set computing (RISC) was more of a shock, in part because it broke with Intel’s tradition of compatibility with earlier processors—and not least because after three well-guarded years in development the chip came as a complete surprise. Now designated the i860, it entered development in 1986 about the same time as the 80486, the yet-to-be-introduced successor to Intel’s highly regarded 80286 and 80386. The two chips have about the same area and use the same 1-micrometer CMOS technology then under development at the company’s systems production and manufacturing plant in Hillsboro, Ore. But with the i860, then code-named the N10, the company planned a revolution.

Keep Reading ↓Show less
{"imageShortcodeIds":[]}