New Layering Process Brings Graphene's 2D Properties to the 3D World

For first time, researchers can now make highly thermally conductive and mechanically strong fibers using different size graphene sheets

2 min read
New Layering Process Brings Graphene's 2D Properties to the 3D World
Illustration: Jie Lian, Rensselaer Polytechnic Institute

Researchers at Rensselaer Polytechnic Institute (RPI) have taken a significant step towards transforming high quality 2D graphene sheets into 3D macroscopic structures that could be used for applications such as thermal management for high power electronics, structural composites, flexible and stretchable electrodes for energy storagesensors, and membranes.

In research published in the journal Science, the RPI researchers developed a new layered structure for graphene that addresses the problem of achieving the mechanical strength of graphene in its 3D form while maintaining its attractive thermal and electrical properties in its 2D form.

“We have developed a new approach in reassembling 2D sheet structures into 3D macroscopic structures with greatly enhanced physical properties,” said Jie Lian, one of the researchers and the lead author in the paper, in an e-mail interview. “The discovery of the highly thermally conductive and mechanically strong fibers using different size graphene sheets is unprecedented for conventional fiber technology.”

The fiber was made with a scalable wet spinning process, according to Lian, and he believes the strategy of using different sized sheet structures can be applied to construct macroscopic structures (papers, fibers, tubes, and fabrics) for other materials with 2D sheet structures.

In previous studies, macroscopic graphene oxide (GO) fibers have been assembled from a dispersion of GO in aqueous media by a simple wet spinning process, with graphene fibers produced upon reduction of the GO fibers. Unfortunately, the reported mechanical strength of graphene fibers produce in this way is relatively low and no thermal properties were evaluated previously, says Lian.

Because un-optimized microstructures and defects in the graphene fibers can significantly affect the thermal-mechanical properties, the RPI team believed that new approaches were needed to improve graphene sheet alignment, compactness and removal of defects and functional groups in order to enhance the physical properties.

The researchers will continue to characterize the inner fiber structure to further understand its properties. But the RPI team envisions perhaps more lofty goals.

“We are also interested in exploring the large-scale manufacturing of graphene fibers by wet spinning process or combining with additive manufacturing for large-scale components,” Lian says. “This should lead us to using graphene fibers in functional textiles for thermal energy storage, thermal management and structural components.”

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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