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Kurt Petersen, 2019 IEEE Medal of Honor Recipient, Is Mr. MEMS

An ink stain on the floor led to a lifetime of building micro devices and sensors and macro companies

12 min read
photo of Kurt Petersen
Photo: Peter Adams

It was 1975, and Kurt Petersen was a smart young researcher, fresh out of the Ph.D. program in electrical engineering at MIT and working in the optics group at IBM's Almaden, Calif., research center. And he was bored. Roaming the massive complex one day, he came across a huge black stain on the linoleum tiles of an otherwise nondescript hallway. That stain would change his life and the course of an entire industry.

In search of the source of the stain—he was that bored—Petersen walked into the nearest lab. The stain, he found out, came from an ink spill. The lab was developing inkjet printer nozzles by etching precise holes in silicon.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
DarkBlue1

A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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