The new transistors are smaller, faster, and consume less power. But, as Khaled Ahmed and Klaus Schuegraf of Applied Materials explain in the November IEEE Spectrum feature Transistor Wars, switching to FinFETs isn't the only way to keep boosting transistor density.
At this year’s Intel Developer Forum, I caught up with Intel Senior Fellow Mark Bohr to ask him how Intel settled on the design and why the company didn’t decide to go with the 3-D transistor’s most mature competitor, planar transistors built on wafers that contain a thin layer of silicon on top of insulating material (those transistors go by two names: fully depleted silicon-on-insulator and ultrathin body silicon-on-insulator).
Bohr says Intel had little choice but to go 3-D. Intel’s 32nm transistors, he says, are “darn good devices”, and switching to a 3-D architecture was the best way to continue improving power consumption and performance while packing more transistors on a chip. Intel has now put these 3-D transistors into production, and Bohr reckons the company is a good four years ahead of its competitors. Whether the rest of the chip industry will follow Intel's lead into the third dimension remains to be seen.
(Image: Intel)
Rachel Courtland, an unabashed astronomy aficionado, is a former senior associate editor at Spectrum. She now works in the editorial department at Nature. At Spectrum, she wrote about a variety of engineering efforts, including the quest for energy-producing fusion at the National Ignition Facility and the hunt for dark matter using an ultraquiet radio receiver. In 2014, she received a Neal Award for her feature on shrinking transistors and how the semiconductor industry talks about the challenge.