Japanese Companies Develop Thin-film 3D Analog ICs

Despite the relentless advance of digital technology into every area of business, industry, and leisure activities, analog integrated circuits (ICs) are holding their own in the global semiconductor market. This year, revenues are forecast to reach US $85 billion—equating to an annual compound growth rate of 10 percent. Driving this demand are advancements in AI, Internet of Things technologies, and autonomous vehicles, all of which rely on analog ICs for functions like sensing and power management. Unlike digital ICs, which process only binary signals, analog ICs can handle continuous signals such as temperature and sound, making them essential for interfacing with the physical environment.

With an eye on this expanding market, two Tokyo-based companies, Oki Electric Industry Co. and Nisshinbo Micro Devices, have partnered to develop thin-film analog ICs. The ICs can also be stacked vertically, which the companies claim improves efforts to miniaturize electronics and integrate more ICs at a time. The technique also lowers costs and increases functionality by enabling more features or improved performance in a smaller space.

“We live in an analog world of sound, light, temperature, and pressure,” says Toshihiro Ogata, assistant manager in production engineering at Nisshinbo. “Analog ICs bridge the physical and digital worlds, processing continuous physical signals such as light and distance detected by cameras and lidar in autonomous vehicles—and converting them into digital data to support safe driving.”

Thin-Film 3D Analog IC Development

The development of thin-film 3D analog ICs involves OKI’s crystal film bonding (CFB) process, which lifts off the functional thin-film layer of the analog IC from the substrate. (The exact process is a trade secret.) The detached layer is then bonded onto another analog thin-film layer separated by an insulation layer such as silicon oxide. The bonding is accomplished by the forces of attraction between molecules, a phenomenon known as intermolecular bonding. Conventional wire bonding connects the stacked layers electrically.

“Compared to our CFB stacking, standard stacking processes typically use TSV [through silicon via, a vertical wiring method connecting stacked chips] and involves advanced processing and special equipment,” says Kenichi Tanigawa, general manager of OKI’s CFB Development Department. He says that the thickness of individual chips in stacks wired with TSV ranges from tens to hundreds of micrometers. “Whereas, in CFB stacks, each chip is only 5 to 10 [micrometers] thick—which is why rewiring using lower-cost conventional semiconductor lithography on widely available legacy systems can be used.”

CFB stacking also enables several different methods of 3D integration to be used. One simple yet clever process uses an identical IC design with wiring pads arranged along one edge. After the first layer has been laid down, each subsequent IC layer is slightly reduced in size and rotated 90 degrees, leaving the wiring pads of the previous lower layers exposed. This method can be used to connect up to four layers of ICs.

However, because the stacked analog ICs are so thin, cross talk occurs between the layers, which can cause signal interference, noise, and performance degradation in the ICs. This is where Nisshinbo steps in with its proprietary shielding technology.

“We use aluminum for the shielding material laid down using conventional semiconductor processes,” says Nisshinbo’s Ogata. He explains that if the entire area of the circuit layer were to be shielded, “it would create a large parasitic capacitance,” referring to the unwanted storage of electrical charge occurring between the circuit layers that can interfere with circuit operations. “That’s because—unlike digital ICs that operate at lower than 5 volts—analog ICs handle voltages as high as 20 or 30 volts, which increases the parasitic capacitance.”

To prevent this, shielding is applied only to critical areas where interference occurs between stacked chips, areas identified by Nisshinbo based on its decades of researching and working with analog ICs. This localization reduces signal interference without affecting circuit functionality, says Ogata.

Advantages of Chiplet Integration

The companies note that thin-film 3D analog IC stacking can also be used in situations where analog and digital ICs are combined. This will enable them to be used in chiplets—modular ICs that can be combined to create more complex devices.

“Chiplets have several advantages over large monolithic devices,” says Ogata. Rather than cramming everything into one large chip, different functions like sensing, processing, and power management are handled separately. Each chiplet can be optimized for its specific function, which lowers costs. Stacking chiplets also reduces space requirements, resulting in smaller devices. And manufacturing yields are potentially higher because if a defect occurs in one chiplet, it can be identified and the chiplet replaced before assembly. (Whereas a defect in one large chip means the entire chip must be discarded.)

Nevertheless, the companies will likely face some challenges before such advanced integration becomes practical.

“The chiplet approach is a very important for next-generation semiconductor manufacturing,” says Gordon Roberts, a professor of computer and electrical engineering at McGill University in Montreal. Whereas today’s chiplets already allow certain components such as CPUs, GPUs, and memory to be mixed and matched, the next step in semiconductor evolution will see more diverse components, such as analog, power, and optical chips seamlessly integrated using innovative stacking and interconnect technologies.

“Having access to a process that can cheaply assemble a mixed bag of components would be a step in the right direction,” Roberts says. “However, as this process uses thinned semiconductor devices to be stacked on a common substrate, the issue becomes one where manufacturing defects will be introduced by the thinning step.” As well as threatening manufacturing yields, defects such as cracks have the potential to slip by the testing process, leading to reliability issues. “So how well the companies handle the individual dies and package them together needs to be identified,” Roberts says.

OKI and Nisshinbo believe they can overcome such issues and are already planning to employ their new method commercially.

“Applying our technologies to chiplet technology means we will be able to offer a range of different analog ICs,” says OKI’s Tanigawa. “And heterogeneous integration of various digital, analog, optical and other semiconductor devices will help lead to the development of new semiconductor chips in the future.” He adds that the two companies have already begun developing new products based on their technologies and plan mass production by 2026.