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Two-Dimensional Materials Tackle the Diode

The p-n heterojunction diode, one of the most common building blocks in electronics, can be made from a 2-D material

2 min read
Two-Dimensional Materials Tackle the Diode
Image: Northwestern University

While graphene by itself has been generating enormous interest in both the research community and outside of it, what many are still missing is that we are in the midst of a two-dimensional material explosion that goes beyond just graphene.

Molybdenum disulfide (MoS2) is beginning to take center stage right behind graphene in the cast of 2-D materials that includes silicene (a single layer of silicon) and boron nitride. Nearly three years ago, MoS2 was revealed as a possible 2-D replacement for three-dimensional silicon in transistors.

Even though MoS2 had an advantage over graphene in that it has an inherent band gap, it was really first imagined as a complement to graphene in applications such as optoelectronics and energy harvesting, where thin, transparent semiconductors are required.

Now researchers at Northwestern have gone back to MoS2's complementary role and combined it with carbon nanotubes to create p-n heterojunction diode. The p-n junction forms the backbone of devices such as solar cells, light-emitting diodes, photodetectors, and lasers.

“The p-n junction diode is among the most ubiquitous components of modern electronics,” said Mark Hersam, director of the Northwestern University Materials Research Center, in a press release. “By creating this device using atomically thin materials, we not only realize the benefits of conventional diodes but also achieve the ability to electronically tune and customize the device characteristics. We anticipate that this work will enable new types of electronic functionality and could be applied to the growing number of emerging two-dimensional materials.”

In a paper published in the journal Proceedings of the National Academy of Sciences (“Gate-tunable carbon nanotube–MoS2 heterojunction p-n diode”), the Northwestern team used single-walled carbon nanotubes as the p-type semiconductor and the MoS2 as n-type semiconductor.

The researchers discovered that when they stacked the two semiconductors vertically on top of each other they formed a heterojunction that allowed for the tuning of the device’s electrical characteristics with an applied gate bias.

In addition to its tunability, the p-n heterojunction diode is highly light sensitive. The researchers exploited this capability by making an ultrafast photodetector with the diode that displayed an electronically tunable wavelength response.

With 2-D materials already proving capable of making field-effect devices, it is hoped that this latest addition of a p-n junction diode made from one will mark an important step in the next generation of electronics.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD

A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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