Tunable Logic

New logic family could help optimize FPGA performance and power

3 min read

5 October 2009—As engineers shrink transistors to tinier dimensions, they're finding it harder and harder to keep the devices from leaking current and wasting power, even when they're switched off. Stanford University researchers, led by electrical engineering professor and Rambus cofounder Mark Horowitz, think they've found a way to effectively plug the leaks, at least for certain types of chips. They've invented a new family of logic circuits that let designers tune a transistor characteristic critical to balancing power loss and performance, even after the chips have been constructed.

"There's always a choice between power consumption and performance when you do a [circuit] design," says Rajit Manohar, a professor in Cornell University's school of electrical and computer engineering, who was not involved in the work. The Stanford technique, called pseudostatic logic, allows you to "pick your trade-off between power and performance" after the chip arrives at your door, he says.

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The Transistor at 75

The past, present, and future of the modern world’s most important invention

1 min read
A photo of a birthday cake with 75 written on it.
Lisa Sheehan

Seventy-five years is a long time. It’s so long that most of us don’t remember a time before the transistor, and long enough for many engineers to have devoted entire careers to its use and development. In honor of this most important of technological achievements, this issue’s package of articles explores the transistor’s historical journey and potential future.

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