The Art of Failure 2014

Failure-analysis experts find some funny stuff in semiconductors

1 min read
The Art of Failure 2014
Image: Lew Li Lian/GlobalFoundries

Photo: Lew Li Lian/GlobalFoundries
Birdie in the Hole: This little bird sits contentedly under the microscope’s gaze, but it didn’t fly there on its own. According to Lew Li Lian from GlobalFoundries, in Singapore, “A particle in the hole caused a cavity formation in the precoat material, resembling a birdie.” It won first prize at the 2014 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Art of Failure Analysis contest.
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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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