Dark silicon is when you have three billion transistors on your chip but you can only use 1.8 percent of them at a time, so as to squeak under the threshold of your chip's draconian energy budget. So the lights are out on vast swaths of a chip's area; hence "dark silicon." This is becoming the rule rather than the exception as process technologies shrink, and the problem is getting worse. To combat it, researchers from the University of California at San Diego are building a mobile application processor with specialized cores that flip dark silicon from a liability to a benefit. Their results, showcased at this week's Hot Chips symposium in Palo Alto, have shown up to 13-fold power efficiency gains. More intriguingly, there’s a chance this could signal competition for ARM.
The problem: Dark Silicon
We'll start with the problem, which as UCSD grad student Nathan Goulding explained, can be called the utilization wall: With each successive process generation, power constraints cause the percentage of a chip that can actively switch to drop exponentially.
The utilization wall is changing the way people build chips. To make his point, Goulding pointed to Intel’s Nehalem architecture, whose "turbo mode" makes some cores run faster while the remaining cores are switched off.
In fact, Goulding's group tested their theory by partially replicating TSMC’s 90-nm process technology, and comparing it to the 65- and 45-nm version of the same. At 65 nm, they found that only 5 percent of the chip could remain active within a 3 watt power budget. At 45 nm, that number had dropped to 1.8 percent.
The solution: C-cores
The solution the UCSD group came up with depends on two insights:
1) Power is now more expensive than area, so trading area for reduced power constitutes a win.
2) Specialized cores can increase energy efficiency by orders of magnitude.
So, the UCSD team is developing a prototype chip that puts specialized cores in the silicon. These are called conservation cores, or C-cores. They sit alongside the general-purpose processor and share the same data cache and memory hierarchy.
The genius thing the UCSD team did is divide up code into two types: Cold code, which is code that’s infrequently used, runs on the general purpose processor as before. Hot code, by contrast, which is accessed frequently, is diverted to the C-cores to reduce energy use.
The result: GreenDroid
GreenDroid will be a mobile application processor (targeted at Android or iPhone) whose energy efficiency has been improved by a factor of 11 by utilizing this special architecturre.
UCSD's prototype chip is targeted for Android phones, which have extreme power constraints. “We think Android is a great fit for C cores,” Goulding said. That’s because when they profiled some common Android apps (including RoboDefense, Google Maps, and Pandora), it turned out that for the hottest 40,000 static instructions, 72 percent of that code was shared by multiple applications. That’s an ideal environment for C-cores.
They compared their processor to a baseline MIPS processor running at 1.5 Ghz. That MIPS processor used 91 picoJoules per instruction. C-cores by themselves were about 18 times more energy efficient. Combining the C-cores (running the hot code) with the general purpose processor running the cold code yielded energy useage of 12 pJ per instruction, about a seven-fold reduction.
Caveats--or are they
Sure, special purpose hardware can achieve great energy efficiency. But what if the software changes? ASICs are troublesome for this very reason: if protocol changes the hardware becomes useless.
But the UCSD team wasn’t caught sleeping: their C-cores use patching to support changes. Better yet, cold regions aren’t even affected by changes, because they already run on the general purpose processor. Hot code can be patched by way of a reconfigurability mechanism, preventing the hardware from becoming immediately obsolete.
To be sure, the warm and fuzzy reception wasn’t heterogeneous; some engineers were heard grumbling that this was just custom cores with a catchy name. But Christos Kozyrakis, the Stanford EE/CS associate professor who was session chair for the GreenDroid presentation, said that while he saw where the comments were coming from, he also did not think any solution had previously been as automated. He was sufficiently impressed with the UCSD work that he chose it for his session: It's the only academic presentation at Hot Chips amid a sea of Intels and AMDs and multiple IBMS.
Three’s company?
If you believe Intel, their Atom processor will ARM-wrestle (sorry) the smartphone market into their grasp any day now.
But while Goulding insisted that the C-core technique would go with ARM like peanut butter with jelly, natural curiosity arose about why UCSD had chosen MIPS as their baseline processor instead of ARM. "We have access to some of the MIPS core," Goulding explained with -1 evasion skills. "Does that mean you’re going to partner with MIPS?" the inquisitor pressed. Goulding looked like the cat who ate the canary: "We have not discussed that yet," he said.
So pardon my ignorance, but does this mean MIPS is going to bust out a chip that will compete with ARM?
Sally Adee, formerly an associate editor at IEEE Spectrum, is now a technology features editor at New Scientist, in London. She says it was an honor to write her last feature for Spectrum about the European Space Agency’s Loredana Bessone, a woman she considers a role model. “One day, I’m going to hit her up at ESA to start training me as an astronaut,” she says with a wink. “Right after I get sick of playing roller derby in London.”
