On Monday, Intel revealed it plans to invest up to $4.1 billion in lithography toolmaker ASML Holdings. The chip giant will mostly purchase equity in the company, but will also throw in about $1 billion for R&D into two key chip-making technologies: extreme ultraviolet (EUV) lithography, which would use smaller wavelengths of light to print tinier chip features, and tools for the production of larger 450-mm silicon wafers, which will help drive down chip costs by pushing chips through in larger batches.
The announcement could certainly be seen as a signal of confidence in (or a great need for or, simply, just a continued commitment to) EUV technology, which has struggled to meet its targets. Intel says it hopes its investment, which could give the company as much as a 15 percent stake in ASML, will help accelerate the readiness of EUV lithography and 450-mm technology by a couple of years.
But it’s still far from clear how soon – or even if – 13.5-nm EUV light will be used to mass produce chips. At the moment, the most advanced chips, including Intel’s new, 22-nm Ivy Bridge processors, are made using immersion lithography, which uses 193-nm light coupled with a liquid layer.
When I spoke with Intel’s advanced lithography director Yan Borodovsky and lithography director Sam Sivakumar after they won IEEE’s 2012 Cledo Brunetti Award (pdf) in June, both were confident that immersion lithography isn’t going away anytime soon.
Intel is looking into a range of next-generation patterning technologies, Borodovsky said. That includes not only the possibility of blasting wafers with EUV, but also of directly writing patterns using electron beams or creating them from the bottom up using directed self-assembly.
But Intel does not anticipate having to use any of these technologies, at least for the coming three or four years. “We have a roadmap for how to do 14 nanometers and 10 nanometers with [193-nm light] if those technologies are not ready,” Borodovsky said. That will likely involve a good amount of what's called "pitch division" or double/triple/quadruple patterning, a process that employs multiple exposures to make smaller features. Indeed, Intel’s investment in ASML is targeting a next-generation tool that should be ready in the 2018-2020 time frame, some time after the Intel’s 10-nm chips are expected to make their debut.
Accepting any new patterning technology, Borodovsky added, will depend on how well it compares with immersion lithography on three key factors: defect density, yield, and cost. Chances are, he said, that whatever patterning technology comes next; it will likely be used alongside immersion lithography as a complementary tool to pattern only those layers where making the switch would improve on those factors.
As for the move to 450-mm wafers, ASML says it expects to have production-level lithography tools that can handle all the wavelengths a fab might need – including EUV – ready by 2017 or 2018.
Rachel Courtland, an unabashed astronomy aficionado, is a former senior associate editor at Spectrum. She now works in the editorial department at Nature. At Spectrum, she wrote about a variety of engineering efforts, including the quest for energy-producing fusion at the National Ignition Facility and the hunt for dark matter using an ultraquiet radio receiver. In 2014, she received a Neal Award for her feature on shrinking transistors and how the semiconductor industry talks about the challenge.
