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Superaccurate GPS Coming to Smartphones in 2018

Broadcom’s mass-market GPS chips boost accuracy to 30 centimeters

4 min read
Photo: Miguel Navarro/Getty Images
Photo: Miguel Navarro/Getty Images

We’ve all been there. You’re drivingdown the highway, just as your navigation app instructed, when Siri tells you to “proceed east for one-half mile, then merge onto the highway.” But you’re already on the highway. After a moment of confusion and perhaps some rude words about Siri and her extended AI family, you realize the problem: Your GPS isn’t accurate enough for your navigation app to tell if you’re on the highway or on the road beside it.

Those days are nearly at an end. At the Institute of Navigation GNSS+ conference in Portland, Ore., in September, Broadcom announced that it is providing customers samples of the first mass-market chip to take advantage of a new breed of global navigation satellite signals. This new chip will give the next generation of smartphones ­30-centimeter accuracy as opposed to today’s 5 meters. Even better, it works in a city’s concrete canyons, and it consumes half the power of today’s generation of chips. The chip, the BCM47755, has been included in the design of some smartphones slated for release in 2018, but Broadcom would not reveal which.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
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A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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