Shrinking Chips and Nanotech: The NY Times Takes a Stab

The NY Times offers up some nanotech solutions for shrinking transistors with some surprising timetables

1 min read

Predicting the end of Moore’s Law and the need to move on past the etched silicon chip is beginning to make me think of the Peak Oil issue. Some say we have already reached Peak Oil and we need to adopt alternative energies more aggressively while others argue that we still have 50 years before it’s reached.

While timetables may differ, sometimes extraordinarily so, there’s no doubt that there is a virtual wall out there for oil and the silicon chip.

The NY Times in its Tuesday science section tackles the debate between the “end is nigh” crowd and the “wait until the next decade” type on the question of Moore’s law and manages to come up with a coherent article.

Of course, from a nanotech point of view it is always interesting to see the nanotechnologies that are trotted out as possible solutions for reducing feature size. We get mention of nanowires and even the latest research on so-called DNA origami.

What had me a little surprised was that reporter seemed to take the word of the IBM researcher interviewed for the piece unchallenged when she said that growing nanowires that would serve as FinFET switches would be available commercially by 2012.

I don’t want to dismiss this as a very real possibility, but surely there might be some others out there who might think differently on that particular timetable. MIght be worth a second quote.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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