Seeing Double

Why There Will Never Be an 8-nm Semiconductor Node

There will never be an 8-nanometer node. We might have something we call an 8-nm node, but it will be a lie, in the sense that this node will have nothing to do with 8-nm features or a 16-nm pitch, or much of anything that can be related to the number 8. We probably won’t even get to the 11-nm node, due to arrive in 2018. Cost‑effective lithography just won’t be available at those dimensions.

To understand why, first recall that a node is the smallest component of the elements of an integrated circuit. From a 1971 size of 10 000 nm, today’s most advanced chips have shrunk to the 45-nm node, so named because the smallest features in the pattern are nominally 45 nm, though the relationship between the name of the technology node and the actual component dimensions is only approximate. In addition to diminishing feature sizes, density and chip-performance improvements are now coming from innovations that have nothing to do with lithography—improved dielectric materials, for example. The traditional way of looking at Moore’s Law as ever-shrinking node dimensions is becoming outdated.

Twenty years ago, technology nodes were named for the highest DRAM size available (does anyone remember the 64-MB node?). But when DRAM sizes stalled at 512 megabytes to 1 gigabyte and lithography scaling was recognized as the No. 1 technology driver for Moore’s Law, the nodes were renamed to reflect the shrinking feature sizes.

In all likelihood, lithography won’t remain the heart and soul of chip making much longer. It’s time we developed a better descriptor for IC improvements and stop pretending that the 22-nm node will be scaled by a factor of two from the 45-nm node—or that this scaling will never end.