Scientists Gain Understanding of Key Nanoscale Force

Researchers offer method for overcoming atomic forces on the surface of materials that cause friction

2 min read
Scientists Gain Understanding of Key Nanoscale Force

When we get down to the nanoscale the world of macroscale physical phenomena we are familiar with is replaced in large part by a new set of phenomena. Among the key forces in this strange new world are Brownian motion and van der Waal forces. One of the great challenges of working on the nanoscale is finding ways to engineer things (move them around and generally get things to do what we want) with atomic forces such as these governing the nanoscale universe.

In a recent article here on the pages of Spectrum online the work of researchers Professor Robert Carpick at the University of Pennsylvania and Professor James Hone at Columbia University, in New York City has given us some better insight into how friction occurs at the atomic scale and how to engineer around atomic forces like the van der Waal force.

According to the Spectrum article, the researchers, who did much of their research with graphene, discovered that the thinner the sheets of the material the greater the friction.

The researchers observed that the atomic forces such as van der Waal forces would cause the sheets of graphene to be attracted to the tip of the atomic-force microscope as it drew closer thus bending the graphene and creating a “puckering effect” on the surface of the graphene. This puckering is what caused the friction.

To overcome this puckering effect the researchers also observed that the thicker the sheets the less they would bend when subjected to the atomic forces. 

By gaining a better understanding of the surface phenomenon at the atomic level, the researchers believe this will help in the engineering for microelectromechanical systems (MEMS) devices and ultimately nanoelectromechanical systems (NEMS) devices. Meanwhile the researchers note that other work is going on now to figure out the best number of sheets of a material to combat this type of friction.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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