This article is part of our exclusive IEEE Journal Watch series in partnership with IEEE Xplore.
At the heart of every successful space mission is a sophisticated and capable computer system.
In the 1960s, relatively basic computing systems took humankind to the moon. More recently, the Parker probe has reached the scorching outskirts of our Sun, and the Voyager probes have left our solar system completely. With each successive generation of space probe, of course, computers have followed the long march of Moore’s law toward smaller, faster and cheaper systems.
But, the question remains: which kind of computing system will best serve humankind's future, more ambitious space explorations?
Even for earthly applications, it can be challenging to develop computers that are the right size, weight, power, and cost. Often one of these desirable features are achieved at the expense of another. For example, more powerful computing systems tend be less energy efficient.
"In space processing applications, these tradeoffs are even more critical, where large volumes of data need to be processed within strict execution time and power consumption constraints," explains Michael Cannizzaro, a pre-doctoral fellow at the NSF Center for Space, High-Performance, and Resilient Computing (NSF-SHREC).
Cannizzaro has been studying and comparing different computing architectures for space applications, and has narrowed in on a choice. As part of his Masters thesis completed this past summer, he is recommending that RISC-V—which has been gaining much traction recently—could be an attractive option for future space missions. Although his work is not yet published, it won a Best Paper award at the 2021 IEEE Space Computing Conference.
According to Cannizzaro, the judges were impressed with his unique approach to analysis, which involved evaluating the RISC-V architecture in a commercially-available processor realized on silicon. "Since commercially-available RISC-V silicon is so new, to my knowledge, this was the first analysis to take a commercial RISC-V chip and use it for space processing-focused evaluations," explains Cannizzaro
He compared RISC-V to four other architecture designs, three of which are already prevalent in space processing applications: ARM Cortex-A9, ARM Cortex-A53, and POWER e5500. After analyzing the different options, Cannizzaro is recommending RISC-V because of its high-power efficiency (which is particularly important for space missions) and the fact that it's open source.
Interestingly, Cannizzaro's analysis suggests that RISC-V does not in fact offer the best performance characteristics. ARM Cortex-A53 achieved this distinction thanks to its vector capabilities, which RISC-V currently lacks. But Cannizzaro notes that RISC-V may be getting vector extensions in the near future. "This will of course open the door for future studies to evaluate the extension's impact on performance and power consumption," he says.
Cannizzaro says he is "extremely honored to win the award" and plans to build upon this work by incorporating additional architectures, processing platforms, and benchmark tests into his analysis. He also has his eye on evaluating the reliability of RISC-V.
"Leveraging a high-performance system is difficult to justify for space if that device is not going to withstand the harsh environments outside of earth's atmosphere, so reliability is another key factor to consider," he says. "Evaluating the reliability of RISC-V silicon is something I am hoping to incorporate into future work."