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Updated: 25 June 2020

Redesigned IEEE Author Center Introduces New-Author Support and Improves Search Capability


The newly redesigned IEEE Author Center now features a section for new authors, a new look, and improved search capability. 

The IEEE Author Center is a one-stop resource for all IEEE authors, offering help and information for those publishing in journals, conferences, books, and magazines. Since its launch in 2017, the IEEE Author Center has helped over 1 million authors learn how to publish with IEEE. We invite you to check out the new site and share any feedback or questions with the IEEE Author Engagement team at

New Tool for Authors Eases Template Selection 

IEEE Publishing Operations is pleased to introduce the IEEE Template Selector tool, which helps authors select and download the right article template for their work. The tool asks the author a series of branching questions to determine the appropriate template and then provides the file for download. We recommend that you try the tool to familiarize yourself with the author’s experience in downloading a template.

Note that template files are no longer housed in the IEEE Author Center website; authors are now directed to the Template Selector to download templates. Be sure to review your author instructions and update them to point your authors to the tool.

Share any feedback you may have on the Template Selector with the IEEE Author Engagement team at

Get Preliminary Feedback on Your Work With TechRxiv


Post your research article drafts to the preprint server TechRxiv (pronounced “tech archive”), which is a free, publicly accessible archive for unpublished research in electrical engineering, computer science, and related technology. 

Posting your drafts enables you to receive early feedback from other researchers before you submit your work for formal peer review and publication. You can post to TechRxiv regardless of where you eventually intend to submit and publish your work.

Guidance for Authors

The IEEE Author Center is a one-stop shop for information on publishing in an IEEE journal, conference, magazine, or book. Topics covered on the website include how to prepare your work for publication, how IEEE handles peer review, what happens after your paper is accepted, and how to adhere to IEEE’s ethical guidelines. Useful resources such as templates and tools are also available to make publishing with IEEE seamless.

Engage With Other Authors

Join your fellow authors in the IEEE AuthorLab, a free community forum about publishing with IEEE. Participate in discussions, share links and ideas about publishing, and ask questions of other community participants or IEEE Publications staff.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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