Rambus Aims for New Ultralow-Power DRAM

New mobile-memory initiative aimed at high-bandwidth, low-power smart phones

2 min read

2 February 2009—Rambus, in Los Altos, Calif., says it has developed a technology to create ultrafast, ultralow-power memory chips for today’s cellphones and future generations of all-purpose mobile platforms. The goal is a single DRAM device with 17 gigabytes per second of bandwidth, 16 times as much as what the low-power DDR3 memory chips in laptops have now. Rambus will demonstrate its test chip this week at DesignCon 2009, in Santa Clara, Calif.

Because consumers are demanding more from smaller packages—the iPhone is a prime example—there are more chips in a smart phone, and they have to be squeezed in pretty tightly. That creates two problems: space constraints and reduced battery life. The Rambus technology aims to kill two birds with one stone. Higher bandwidth means that you can gain access to more memory without adding more chips, and by optimizing the power consumption in the memory, you can increase battery life for the entire phone.

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Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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