NIST Reveals Reliability Problems with Carbon Nanotubes in Electronics

While research indicates that CNTs use as interconnects in logic memory devices may be compromised, hope remains for other application areas

2 min read
NIST Reveals Reliability Problems with Carbon Nanotubes in Electronics

Poor old carbon nanotubes. CNTs have long been heralded as the new wonder material, especially in electronics applications where their charge-carrier mobility was able to outperform silicon—according to some estimates by a factor of 10—but researchers have struggled to find a satisfactory proposal for getting them into some kind of ordered array

While researchers have continued for the last 20 years to push CNTs beyond a single transistor or attempted to use their propensity for forming a rat’s nest as a strength rather than a weakness, they have faced the unexpected problem over the last decade of their toxicological issues

First, the research hasn’t progressed quite as hoped. Then, environmental, health, and safety concerns presented an entirely new challenge. But—as though those two weren’t enough—along comes a new wonder material: graphene.

As I said, poor old CNTs. So it should come as no surprise in the tale of woe that has followed CNTs that NIST should report CNTs have a major reliability issue in electronics.

The research was presented in a paper at the recent IEEE Nano 2011 in Portland, Oregon. From the NIST Web site:

“…NIST researchers fabricated and tested numerous nanotube interconnects between metal electrodes. NIST test results, described at a conference this week, show that nanotubes can sustain extremely high current densities (tens to hundreds of times larger than that in a typical semiconductor circuit) for several hours but slowly degrade under constant current. Of greater concern, the metal electrodes fail—the edges recede and clump—when currents rise above a certain threshold. The circuits failed in about 40 hours.”

One of the authors of the paper, Mark Strus, a NIST postdoctoral researcher, suggested that while this research may spell the end for CNTs as “the replacement for copper in logic or memory devices,” there still remained the possibility of using the material for “interconnects for flexible electronic displays or photovoltaics.”

That is, of course, when just looking at CNTs’ use as an interconnect. The field of research for CNTs has become so broad over the past 20 years that they are being tested for use in fields as divergent as electrodes in lithium-ion batteries to improving medical imaging.

We haven’t yet reached the point of singing CNTs swan song.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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