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New Trick Produces Whole Wafers of Perfectly Aligned Nanowires

Korean researchers use semiconductor manufacturing processes rather than chemical synthesis to build better nanowires faster

2 min read
New Trick Produces Whole Wafers of Perfectly Aligned Nanowires

Nanowires don’t quite get the recognition that their high-profile nanomaterial cousins carbon nanotubes and graphene receive. But nanowires are quietly leading toward big improvements in a new generation of photovoltaicsplastic OLEDs (organic light-emitting devices), and a bunch of other applications.

Nanowires have suffered from the same manufacturing issues that other nanomaterials have endured, namely achieving large scale production while maintaining quality. One of the key problems nanowire developers have had to overcome is getting the nanowires to orient themselves in perfectly even arrays.

Researchers at the Korea Advanced Institute of Science and Technology (KAIST) in cooperation with LG Innotek have found a solution to that problem. And that solution moves away from traditional chemical synthesis to toward tricks common to semiconductor manufacturing.

In research published in the journal Nano Letters (“High Throughput Ultralong (20 cm) Nanowire Fabrication Using a Wafer-Scale Nanograting Template”), the Korean team leveraged semiconductor processes  to produce highly-ordered and arrays of long (up to 20 centimeters) nanowires, eliminating the need for post-production arrangement.

The process involves a photo engraving technique on a 20-centimeter diameter silicon wafer. First the researchers created a template on the wafer consisting of an ultrafine 100-nanometer linear grid pattern. Then they used this pattern to lay down the nanowires using a sputtering process. The method produces nanowires in bulk in perfect shapes of 50-nm width and 20 cm maximum length.

“The significance is in resolving the issues in traditional technology, such as low productivity, long manufacturing time, restrictions in material synthesis, and nanowire alignment,” commented Professor Jun-Bo Yoon of KAIST in a press release. “Nanowires have not been widely applied in the industry, but this technology will bring forward the commercialization of high performance semiconductors, optic devices, and biodevices that make use of nanowires.”

Because the process doesn’t require a long synthesis time and results in perfectly aligned nanowires, the industrial partners in the research believe that it’s a technique that should lend itself to commercialization.

Image: KAIST

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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{"imageShortcodeIds":[]}