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New AFM Technique Reveals Piezoelectricity in Ferroelectric Materials

The potential for ferroelectric materials in next-generation electronics gets a boost

2 min read
PFM phase image of a 400 nm thick BiFeO3 (BFO) ferroelectric film, which looks like a light orange square inside of a red rectangle.
Image: ICMAB-CSIC/Nature Communications

A team of researchers at the University Autonoma of Barcelona has created a new atomic force microscopy (AFM) technique that exploits the direct piezoelectric effect to take a measurement of the piezoelectric effect in ferroelectric materials.

The technique, dubbed direct piezoelectric force microscopy, should enable a better understanding of piezoelectric and ferroelectric materials that form the basis of a number of today’s technologies, such as ultrasound generators for echography scanners, or, in the future, CMOS replacement switches.

The piezoelectric effect, in which compressing or stretching a material produces a voltage, or where a voltage can cause a material to expand or contract, has been well characterized since the Curie brothers first measured it in 1880. However, ferroelectric materials—which can have their electric field polarization changed via an electric field—have only recently become better understood, in large part thanks to advances in AFM, in particular piezoresponse force microscopy (PFM).

The PFM technique exploits what is termed the converse piezoelectric effect, which involves measuring the material deformation under an AC electric field that is being applied through the AFM tip that is in contact with the material’s surface.

The Spanish researchers have taken this PFM technique, which is essentially an indirect measurement technique as it measures vibration by how much tip displacement occurs, and made it a direct measurement technique.

In research described in the journal Nature Communications, the researchers have demonstrated that a direct measurement can be taken by first applying a force to the material to study. As a consequence of the piezoelectric effect, a charge is built up by the mechanical stress applied. With this technique, the AFM tip strains the material and collects the charge that is generated.

“The conventional PFM works by using the converse piezoelectric effect, which implies applying a bias to the material and recording its expansion and contraction,” explained Andrés Gómez Rodríguez, co-author of the research. “Here we demonstrate that the direct effect can be recorded.”

The key breakthrough of the technique, which has a European patent, is that it makes possible the recording of the tiny currents that are generated through the force applied in AFM, mapping the piezoelectricity in a direct manner.

Prior to this research, the only way to measure such a small amount of current was through the use of a special amplifier that was only made available late last year, according to Gómez. “Another major breakthrough of this mode is demonstrating that we are able to measure such tiny amount of currents at the nanoscale, with an AFM,” he added.

This recent breakthrough is the sum of a number of small steps, according to Gómez. First, he notes previous work erroneously did not consider the leakage current of an amplifier in the measurements. Another key was the use of a special AFM probe, which consists of a fully platinum ultra-stiff tip.

In the patent for the technology, the researchers have included the use of a nanoindenter to perform the work. Continued work on this nanoindenter will represent the next step of their research in terms of the technique itself.

As far as employing the technique, the research team has received funding to probe the ferroelectricity and piezoelectricity of a solar cell technology based on a lead halide perovskite. “Piezoelectric property is super important to understand the high efficiency of the cell,” said Gómez.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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