Nanopillars on Surface of Thin-Film Silicon Could Lead to Better Solar Cells

Combining silicon with thin-film technology could lead to cheaper solar cells with higher energy-conversion rates

1 min read
Nanopillars on Surface of Thin-Film Silicon Could Lead to Better Solar Cells

When you start to discuss the power conversion–efficiency of solar cells, you are bound to ruffle some feathers.

To many it’s an apples-and-oranges debate. You have multijunction solar cells with conversion efficiency rates at 42 percent while dye-sensitized solar cells are now reaching just 10 percent. It's hard to see how they compare—never mind compete.

But what are we really trying to get at with this standard? It would seem that we are trying to sort out the best alternative per kilowatt hour (kWh). Why we don’t set aside the whole energy conversion efficiency debate to focus on kWh figures remains a bit of a puzzle for me.

That said, researchers at the A*STAR Institute of Microelectronics in Singapore tackled the fact that the best thin-film photovoltaics only approach half the energy conversion efficiency of conventional bulk silicon solar cells.

The research, led by Navab Singh and published in the IEEE journal Electron Device Letters, brought about a thin film of silicon with “nanopillars” on the surface to heighten light absorption.

"By investigating a variety of appropriate vertical nanopillar designs, we can enhance the light-trapping and -collection efficiency of thin films to compensate for the efficiency loss caused by reduced material quality and quantity," says Singh.

The trick, of course, is to match—or at least better approach—the energy conversion–efficiency rates of single-crystalline silicon solar cells with thin-film silicon solar cells. Whether this is the particular answer to achieving that remains to be seen, but it seems to be a move in the right direction, unlike the pursuit of ever-higher conversion rates.

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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