The race to build 3-D memories is starting to heat up.
Last week, Intel and Micron announced they have developed a 3-D NAND memory with 32 layers that they expect to mass produce later this year. (That’s 31 layers more than most flash on the market.)
Intel billed the memory as the world’s highest-density flash, capable of creating gumstick-sized solid-state drives with more than 3.5 terabytes of storage. The announcement was hot on the heels—by a matter of hours—of news from Toshiba, which collaborates with SanDisk, that it too has begun sending out samples of 3-D NAND chips.
3-D, or vertical, NAND is flash memory that’s been turned on its side. Instead of laying down bits on the surface of a chip, chipmakers arrange the bit lines vertically, in a forest of pillars.
In the past, I’ve called this a “right turn around Moore’s Law”, since it’s a way to get around the difficulties chipmakers are facing in shrinking memory cells. By extending memory into the third dimension, engineers can pack more bits into the same area without having to make those bits any smaller, much like a real-estate developer might hope to pack people into high-rises instead of single family homes.
The announcements suggest that flash manufacturers have largely overcome the main technical hurdles to making the switch to the 3-D structures. But analyst Jim Handy of Objective Analysis in Los Gatos, Calif., who has been covering 3-D NAND in depth on his website, advises taking the delivery dates that companies have been giving with a grain of salt.
It’s likely these companies are trying to close the lead with Samsung, which started shipping 3-D NAND chips last year. Intel and Micron’s “public announcement comes from the enormous pressure these guys feel from Samsung’s actions,” Handy says. “Since Samsung is shipping, and beating the 3-D drum at every opportunity, the other flash makers look like they are falling behind.”
But while, Samsung might have been early out of the gate, he says, it has probably been producing those chips at a loss. The company began shipping chips so early, it’s possible that the company might not have worked the kinks out of its manufacturing process. That would mean a fairly low fraction of its 3-D flash chips are workable, making them more expensive than the 2-D version. “Samsung has elected to ship [3-D NAND] prior to its becoming economical,” Handy says. “This is helping the company bolster its reputation as a technology leader.”
Handy says the difficulty in making the switch could mean 3-D NAND might not be economical until 2017. The question is whether companies will choose to push forward with the memory regardless, or wait until the manufacturing process is more mature.
“I don’t think that Intel and Micron are close to being economical yet, but they are optimistic that they will reach that point next year,” Handy says. “I am pessimistic, since [I’ve seen] significantly simpler transitions cause delays of a year or longer.”
Rachel Courtland, an unabashed astronomy aficionado, is a former senior associate editor at Spectrum. She now works in the editorial department at Nature. At Spectrum, she wrote about a variety of engineering efforts, including the quest for energy-producing fusion at the National Ignition Facility and the hunt for dark matter using an ultraquiet radio receiver. In 2014, she received a Neal Award for her feature on shrinking transistors and how the semiconductor industry talks about the challenge.