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Inside the iPad--A Chip from A Design Veteran

The new iPad boasts a brand new chip, most likely from veteran chip designer Dan Dobberpuhl

1 min read
Inside the iPad--A Chip from A Design Veteran

The speculation is over, Steve Jobs just announced the long rumored Apple tablet computer. It's the iPad, and the event is continuing as I write this. For Jobs, it's more about what it can do than how it does it, and that's usually a good thing for consumers. So the event is more about demos than hardware.

But the hardware is interesting. For starters, there's the microprocessor. It's a new one, designed internally at Apple, tagged the 1GHz Apple A4 chip.

Remember Apple's acquisition in 2008 of chip company P.A. Semi, founded by Dan Dobberpuhl, formerly of Digital Equipment Corp.? IEEE Member Dobberpuhl designed the DEC Alpha and Strong-ARM microprocessors, and received the 2003 IEEE Solid-State Circuits Award for his work. Last summer, the rumor mill speculated that Dobberpuhl was running a team of low-power experts to design a chip that would give a cell-phone higher power and longer battery life than its competitors. It looks like instead of a cell phone, Dobberpuhl has been working on the iPad project. If that's the case, given his track record, this is good news for this new product.

Photo: Apple

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
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A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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