Iberian Nanotech Center Opens with Promise of a New "Age of Discovery"

In Iberia's previous "Age of Discovery" they had foundations in navigation and seamanship, in their nanotech "Age of Discovery" they have a shiny new research center

1 min read

Assorted Spanish and Portuguese dignitaries assembled for the opening for the new International Iberian Nanotech Laboratory located in Braga, Portugal.

Given such an occasion and such an assembled cast of politicos and even royalty we were bound to here some reference to the golden age of Spain and Portugal’s age of discovery. And we were not disappointed.

 

"In the age of discovery, we had a lot of success. With this project, Portugal and Spain will chart a new atlas of innovation and will make new discoveries," said Spain’s president, Jose Luis Rodriguez Zapatero.

I have commented somewhat skeptically on this research center earlier this year.

I am sure it will be a huge success, as far as we'll ever know. However it turns out, it should prove interesting to see how this center develops since it should serve as a benchmark for other countries who develop large and expensive nanotech research centers without having much of a foundation for it either in their scientific or industrial communities.

 

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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