Graphene-based Nanoantennas Could Speed Up Wireless Networks

Far-off applications for nanomachines have been proposed, but initial uses seem the most attractive

2 min read
Graphene-based Nanoantennas Could Speed Up Wireless Networks
Illustration: Ian Akyildiz and Josep Jornet/Georgia Institute of Technology

Researchers at the Georgia Institute of Technology say they've demonstrated via computer modeling that nano-antennas made from graphene could enable networks of nanomachines

It’s not clear exactly what kind of nanomachines the researchers are referring to, but a guess is that they are something along the lines of Eric Drexler’s proposal nearly thirty years ago of universal assemblers. I suppose another computer simulation of how nanomachines could be developed is welcome, but it sure would be good to see more physical experiments in developing the little rascals. In any case, I am not sure that making antennas for them has been the main stumbling block preventing them from being built over the last three decades.

Aside from enabling communication between nanomachines, the graphene antennas could be used in mobile phones and Internet-connected laptops to help them communicate faster.

The trick to the new antennas is the graphene. Unlike copper and other materials graphene could operate with very little energy. Because of graphene’s honeycomb structure its surface generates an electronic surface wave.

“We are exploiting the peculiar propagation of electrons in graphene to make a very small antenna that can radiate at much lower frequencies than classical metallic antennas of the same size,” said Ian Akyildiz, a professor at the Georgia Institute of Technology, in a press release. “We believe that this is just the beginning of a new networking and communications paradigm based on the use of graphene.”

The "peculiar propagation" to which Akyildiz refers occurs when the electrons in graphene are excited by an incoming electromagnetic wave. The electrons in this case start moving back and forth, creating an oscillation of charge, which in turn produces a confined electromagnetic wave on the surface of the graphene.

This phenomenon is known as a surface plasmon polariton (SPP) wave and would make it possible for the graphene-based nanoantennas to operate at the low end of the terahertz frequency range, between 0.1 and 10 terahertz. While metals, such as gold, are capable of generating an SPP, they do so only at a much higher frequency.

No Georgia Tech nanotech-related story would be complete without a reference to Professor Zhong Lin Wang’s work in exploiting the piezoelectric qualities of zinc oxide nanowires to create “nanogenerators”. And the graphene nanoantenna is no exception.

In this case, the idea is that the nanogenerators in combination with the nanoantennas would make possible networked nanomachines that require very little energy and get the energy they need from movement to the piezoelectric nanowires.

“With this antenna, we can cut the frequency by two orders of magnitude and cut the power needs by four orders of magnitude,” said Josep Jornet, a graduate student at the time of the research and now an assistant professor at the State University of New York at Buffalo, in the press release. “Using this antenna, we believe the energy-harvesting techniques developed by Dr. Wang would give us enough power to create a communications link between nanomachines.”

While the researchers sound quite enthused about enabling nanomachines, they might find that initial applications in macroscale wireless networks far more rewarding. This is especially true considering that the simulations indicate that the terahertz band the graphene antennas enable can boost data rates in wireless networks by more than two orders of magnitude. Enabling communications between devices that don't exist doesn't sound quite as impressive.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
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A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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