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Graphene Gets Some Competition

New building blocks for 2-D circuits

3 min read
Graphene Gets Some Competition
Illustration by Emily Cooper

“Flatland” has never looked so good. A little less than a decade ago, physicists showed they could pull away loosely bound layers of graphite to reveal graphene, a 2-D carbon structure. The material was shown to have very promising electronic properties. But graphene isn’t the only game in town. A whole host of 2-D structures are attracting attention. Many can be formed just as graphene is, from layered 3-D materials; one such material, molybdenum disulfide, has been used in recent months to form flexible, transparent transistors and some of the basic building blocks of logic chips. Others are flattened forms of naturally 3-D structures. In April, for example, a team based at Ohio State University reported they had wrangled germanium, a mainstay of the semiconductor industry, into a 2-D structure that transports electrons faster than its 3-D counterpart does.

Rounded up here are some of the most promising materials on the 2-D scene. Some offer smaller and less power-hungry transistors that could be used for future logic and memory chips. Others could be ideal for computing with light and for other far-out applications. Some may work in concert with one another or with graphene, while others are direct competitors.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
Vertical
A stack of 3 images.  One of a chip, another is a group of chips and a single grey chip.
Intel; Graphcore; AMD
DarkBlue1

A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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