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Graphene and Carbon Nanotubes Join Forces to Tackle Supercapacitors

Combining the two wonder materials could lead to low-cost, high-performance electrodes for supecapacitors

2 min read
Graphene and Carbon Nanotubes Join Forces to Tackle Supercapacitors
Image: Journal of Applied Physics

Graphene and carbon nanotubes have been competing for many of the same applications for years, especially in the broad area of electronics. The jockeying for supremacy between these two carbon materials has been fierce in energy storage applications as well. In fact, both carbon nanotubes and graphene have been proposed as a replacement material for activated carbon on the electrodes of supercapacitors.

Now, following a newly developing trend where graphene and carbon nanotubes join forces to create an even better material than they could on their own, researchers at George Washington University have combined the two materials to create a supercapacitor that is claimed to be both low cost and high performance.

In research published in the Journal of Applied Physics ("Paper-based ultracapacitors with carbon nanotubes-graphene composites"), the GWU researchers mixed graphene flakes with single-walled carbon nanotubes through an arc discharge under various magnetic conditions.

The resulting combination takes advantage of the high-surface area and good in-plane conductivity of graphene flakes while the carbon nanotubes connect all the structures to make a uniform network. The device’s specific capacitance—its ability to store a charge—was reported as 100 Farads per gram (F/g), three times higher than the specific capacitance of a supercapacitor made by carbon nanotubes alone.

“In our lab we developed an approach by which we can obtain both single-walled carbon nanotubes and graphene, so we came up with the idea to take advantage of the two promising carbon nanomaterials together," said Michael Keidar, a professor at GWU and director of the Micro-propulsion and Nanotechnology Laboratory, in a press release.

Supercapacitors, also known as ultracapcitors or electrochemical double-layer capacitors (EDLCs), have held out the promise that they could store as much energy as an electrochemical battery like a lithium-ion battery, but charge up in a matter of seconds and provide quick bursts of a large amount of power as they do now for applications such as powering cranes or buses.

This potential has fueled the hope that supercapacitors could be used to power all-electrical vehicles, providing as much range as a lithium-ion battery does but charge up faster than the time it takes to fill up a car with gasoline. The interest in applying nanomaterials to these devices has become so intense that the lines between batteries and supercapacitors are becoming blurred as new materials are proposed.

In the race to practical—and potentially lucrative—applications, a promising approach in giving supercapacitors the same storage capacity as an electrochemical battery is increasing the surface area of the electrodes. More surface area translates into more ions being stored on the electrodes and the greater specific capacitance. While much is made of graphene’s theoretical surface area of 2630 squared meters per gram, so far the largest surface area anyone has produced with graphene has been 1520 squared meters per gram, which is pretty typically found in today’s activated carbon made from crushed coconuts.

So, the jury is still out on whether graphene or carbon nanotubes are viable alternatives to activated carbon for today's supercapacitor applications, even if you lower the cost of the material (it’s hard to compete with crushed coconuts).

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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