The struggle for which material will be the de facto choice for two-dimensional (2-D) devices in future electronics has been ratcheting up over the last couple of years. In July of last year, IEEE Spectrum covered the development of the long-predicted single-layer thick structure of silicon, known as silicene. 2-D silicon is expected to have some of the same remarkable characteristics as graphene, but deliver them in a material that the semiconductor industry has been working with for decades.
Another material that has been pushing graphene for the throne of the 2-D material of the future has been molybdenum disulfide (MoS2). Two years ago it seemed that at best MoS2 could achieve would to be simply a complimentary material to graphene in applications that required transparent semiconductors. Over the last six months, it’s no longer clear that MoS2 shouldn't have it's own starring role.
So it would seem that graphene needs to step up its game if it’s to stake its claim to the 2-D material of the future for electronics applications. Researchers at Rice University have taken up the challenge and developed a process that can be duplicated with lithography techniques to weave graphene (the conductor) with hexagonal boron nitride (h-BN) (the insulator) to create patterns at nanoscale dimensions.
The research, which was published in the journal Nature Nanotechnology (“In-plane heterostructures of graphene and hexagonal boron nitride with controlled domain sizes”), is the latest evolution of a technique that was developed at Rice nearly three years ago. What distinguishes this new version is that the researchers were able to shrink the 2-D devices to even smaller dimensions.
“It should be possible to make fully functional devices with circuits 30, even 20 nanometers wide, all in two dimensions,” said Rice researcher Jun Lou, a co-author of the new paper in a press release. He added that this should result in circuits on about the same scale found in today's semiconductor fabrication.
Like the original technique, the new method involves chemical vapor deposition (CVD). However, the new process is a bit more sophisticated. The original simply used CVD to merge the graphene and the h-BN to create sheets with pools of the two materials. It afforded the ability to control somewhat the electronic properties of the material.
Lead author Zheng Liu, a Rice research scientist, and his colleagues took this technique a step further by first depositing a sheet of h-BN with CVD. Then they placed photoresistant masks over the h-BN and etched away the exposed material with argon gas. After creating even finer patterns with a focused ion beam, graphene was grown in the empty spaces again using CVD.
The key to the work is the level of precision that can be achieved in the transitions between the graphene and the h-BN. “It’s very precisely engineered,” Lou adds in the press release. “We can control the domain sizes and the domain shapes, both of which are necessary to make electronic devices.”
The next steps will be to fully characterize the atomic bonds where graphene and h-BN domains meet. After that is done the researchers hope to move on to adding a third material to the mix: a semiconductor.
In reference to bringing a semiconductor into the mix, Liu adds: “We’re trying very hard to integrate this into the platform. If we can do that, we can build truly integrated in-plane devices.”
Image: Zheng Liu
Dexter Johnson is a contributing editor at IEEE Spectrum, with a focus on nanotechnology.