Europe Has Invested €1 Billion Into Graphene—But For What?

Six years into an ambitious 10-year research project, experts weigh in on whether the Graphene Flagship can help the “wonder material” make it through the Valley of Death

5 min read
The word 'Graphene' on a map of Europe.
Photo: Shutterstock

Six years ago, the European Union (EU) embarked on an ambitious project to create a kind of Silicon Valley for the “wonder material” of the last decade: graphene. The project—called the Graphene Flagship—would leverage €1 billion over 10 years to push graphene into commercial markets. The project would bring together academic and industrial research institutes to not only ensure graphene research would be commercialized, but to also make Europe an economic powerhouse for graphene-based technologies.

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3 Ways 3D Chip Tech Is Upending Computing

AMD, Graphcore, and Intel show why the industry’s leading edge is going vertical

8 min read
AMD 3D V-Cache
AMD
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A crop of high-performance processors is showing that the new direction for continuing Moore’s Law is all about up. Each generation of processor needs to perform better than the last, and, at its most basic, that means integrating more logic onto the silicon. But there are two problems: One is that our ability to shrink transistors and the logic and memory blocks they make up is slowing down. The other is that chips have reached their size limits. Photolithography tools can pattern only an area of about 850 square millimeters, which is about the size of a top-of-the-line Nvidia GPU.

For a few years now, developers of systems-on-chips have begun to break up their ever-larger designs into smaller chiplets and link them together inside the same package to effectively increase the silicon area, among other advantages. In CPUs, these links have mostly been so-called 2.5D, where the chiplets are set beside each other and connected using short, dense interconnects. Momentum for this type of integration will likely only grow now that most of the major manufacturers have agreed on a 2.5D chiplet-to-chiplet communications standard.

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{"imageShortcodeIds":[]}