The October 2022 issue of IEEE Spectrum is here!

Close bar

DOE Increases Funding for Nanotech by 40% in 2009

DOE increases funding to research into using nanotech for energy applications without much in the way of saying what the increase will accomplish

1 min read

No sooner do I announce my “War on Nanotech-and-Energy Hype” (I’m wondering if I can have that made up into some exhilarating video graphic) then none other than the New York Times--that bastion of useful information about nanotech--informs us that the US Department of Energy has increased its funding of nanotechnology research by 40% to an estimated $337 million in 2009 from $245 million in 2008.

This latest broadside in my ongoing battle to fight the hype was really distressing. We get numbers like “40%” and “$337 million” thrown around like they actually meant something beyond bragging rights for national nanotechnology initiatives and for researchers in the energy field to rub it in the nose of say a typical biomedical researcher.

So despite one researcher in the energy field remarking that this increase in funding will really “move the needle,” we are not told what this additional $92 million is going to do for nanotech/energy research other than pay for some construction to build a massive new synchotron.

Just when I thought it couldn’t sink any lower, we are informed that all this nanotech research in energy could provide us with low-cost fuel cells—I started to fall into a deep depression.

It seems the hard part of the government’s role in nanotech funding is not getting the money, and increasingly larger amounts of funding by the way, but someone looking at how the money can best be spent beyond building new research facilities.

The Conversation (0)

3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper
Green

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

Keep Reading ↓Show less
{"imageShortcodeIds":[]}