Digital Data Written in Stone

17 June 2009—What do data archivists have in common with monarch butterflies, salmon, and most geese? They are always preparing for their next migration. From magnetic tape through hard disks, floppy disks, CDs, DVDs, and Blu-ray, digital data formats change periodically, forcing archivists to migrate their data before obsolescence or end-of-lifetime sets in. But now Tadahiro Kuroda, a research engineer and professor at Keio University, in Yokohama, Japan, and his team have come up with a device that could put an end to this recurring—not to mention costly—upheaval in data preservation by maintaining the data safely in an unchanging format that’s predicted to last 1000 years.

The device is a permanent memory system based on semiconductor technology. The prototype consists of four stacked 300-millimeter silicon wafers incorporating 2.5 terabits, (320 gigabytes), of data encoded on read-only memory and fabricated using a 45-nanometer complementary metal-oxide-semiconductor (CMOS) process, together with a separate data reader. Data is written on the chips using an electron beam, and the package is sealed with silicon-based film to prevent erosion.

On-chip inductors receive power through the silicon seal by induction from a reading device. Separate inductors transmit data to the reader. The reader can be made small enough to read one chip at a time or large enough to read the entire stack in one session, depending on a customer’s needs.

Kuroda worked in Toshiba Corp.’s semiconductor division for 16 years before moving to academia, and he has spent much of his recent past researching chip-to-chip wireless communications. Traditionally, wire bonding has been used for interchip communications. But given the progress made in semiconductor geometric scaling and chip-stacking schemes, Kuroda says this method has reached its limit. A popular solution that many companies are looking at, through-silicon vias (TSVs), which uses interconnects passing through an entire stack of chips, is expensive and not always reliable, he says.

”Now, though, we can go from mechanical contacts to electrical contacts by embedding transceiver circuits,” explains Kuroda. ”In other words, we make the connections wireless.”

Each chip in the prototype, dubbed the Digital Rosetta Stone, incorporates four noncontact power inductors and four similar but smaller inductors for communication. To overcome the challenge of eliminating noise between the two sets of coils, the researchers devised a time-interleaved power and data scheme. The reader first induces up to 56 milliwatts of power in a chip’s power coils by generating an alternating magnetic field. The chip stores the received energy in capacitors, and after the transfer of power has ended, the reader and chips then communicate on data requirements. Data is then queued to a buffer and retrieved by the reader. The system can transmit data at a rate equivalent to about 800 megabits per second.

A second major challenge lay in minimizing the ripple arising in the DC voltage after the voltage induced into the coils was rectified. To overcome this, the device uses four channels—hence the four inductors—for power delivery. The inductors have ”their phases skewed 45 degrees to each other, which makes the ripple voltage sufficiently small,” says Kuroda.

He estimates the total cost of the current prototype at around US $600. ”Yes, that’s expensive,” he says. ”But if you think of it lasting over 1000 years, as semiconductor industry data estimates, it is actually inexpensive, and there would be no migration costs.” Besides, he adds, with Moore’s Law bringing down the price per bit, ”10 years from now a commercial device will be the size of a CD, have a capacity of 6 terabits, and cost about $15.”

Kuroda, an IEEE Fellow, says Sharp Corp. is showing interest in the technology. He predicts that commercialization will come in 5 to 10 years, with entities such as the Library of Congress, UNESCO, and Hollywood studios likely to be the first customers.