DARPA’S $1.5-Billion Remake of U.S. Electronics: Progress Report

Agency is adding security and AI design to a mix meant to boost U.S. industry

10 min read

Samuel K. Moore is IEEE Spectrum’s semiconductor editor.

Conceptual illustration of chips made from building blocks
Illustration: DARPA

About a year ago, the U.S. Defense Advanced Research Projects Agency pulled back the covers on its five-year, $1.5-billion scheme to remake the U.S. electronics industry. The Electronics Resurgence Initiative included efforts in “aggressive specialization” for chip architectures, systems that are smart enough to reconfigure themselves for whatever data you throw at them, open-source hardware, 24-hour push-button system design, and carbon-nanotube-enabled 3D chip manufacturing, among other cool things. As always with DARPA, this is high-risk research; but if even half of it works out, it could change the nature not just of what kinds of systems are designed but also of who makes them and how they’re made.

Mark RoskerPhoto: DARPA

On 18 June, IEEE Spectrum spoke with IEEE Fellow Mark Rosker, the new director of the Microsystems Technology Office, which is leading ERI at DARPA. Rosker talked about what’s happened in the ERI programs, what new components have been added, and what to expect from the 2nd ERI Summit. That event will be held 15-17 July in Detroit, Mich., and headlined by the CEOs of AMD, GlobalFoundries, and Qualcomm.

Mark Rosker on:

IEEE Spectrum: How is the Electronics Resurgence Initiative going?

Mark Rosker: It’s a really good question. And I guess that is the question that is the underpinning of the second summit that we’re going to be having, I guess, about a month from now. I think it’s going extremely well. What we’re doing now is moving closer towards DARPA’s more traditional mode of operation, in which we have identified specific areas that we think are really game-changing technologies that we’re trying to go after, and have specific programs that address each of those areas. At the same time, I’m constantly on the lookout for new projects, new programs, that will be disruptive and be within the charter of the Electronics Resurgence Initiative. So to a degree, that feels very comfortable to us, but in no way is that to say it’s incremental. It’s just how we do business.

IEEE Spectrum: What was the advantage to making a concerted push last year?

Mark Rosker: Running that many new-program starts at the same time probably is not the most efficient thing for us. By probably, I mean it isn’t. But in terms of its value in capturing the community, in capturing attention, in getting the people who traditionally have not been that interested in participating in government research, to pay attention, I think it had great value. I think that where we are now is: We have their attention. And so, it’s probably more important to regain that efficiency.

IEEE Spectrum: Can you give any updates on the progress in some of the key programs that started ERI off last year? Some of them had pretty amazing goals, such as seeking push-button 24-hour system design and making 90-nanometer foundries competitive with 7-nm ones.

Mark Rosker: A lot of the discussion that will be held in Detroit will be talking about some of the details of the specifics of what each of the performers have done. And I don’t want to get too far ahead and make some generalizations about how we’re doing in that area.

DARPA kicked off the Electronics Resurgence Initiative in San Francisco last July. This year's summit is in Detroit.DARPA kicked off the Electronics Resurgence Initiative in San Francisco last July. This year’s summit is in Detroit.Photo: DARPA

IEEE Spectrum: ERI’s programs were centered on three main pillars: design, architecture, and materials & integration. Has that evolved any now that there are new sub-programs in play?

Mark Rosker: At the summit, I’ll probably be talking about how, going forward, ERI will be divided into four different areas. The first area [will focus on] new materials and devices that go beyond the materials and device people traditionally had to use. Largely, we’re talking about silicon in that case. The second area is a very familiar theme that [former ERI director, now special assistant to director at DARPA] Bill Chappell talked a lot about: specialized functions circuits that are really focused and optimized to do specific tasks.  The third area is really tools that help you organize those specialized functions, and also enable you to incorporate security without necessarily being an expert at security. And then lastly, is heterogeneous integration: How do you tie these new specialized functions together.

Back to top

IEEE Spectrum: Heterogeneous integration, particularly through chiplets, is something that’s being actively explored and debated now by industry. Is there a back-and-forth between this program and that debate?

Mark Rosker: Yeah. I really do believe that in 10 years or in 20 years, this period of electronics, more than anything else, may be associated with heterogeneous integration. Really, it’s just the physical manifestation of everything we’ve been talking about. So what you’re asking is, what are the standards and processes that are going to allow this to take place on a global scale. The CHIPS program [Common Heterogeneous Integration and IP Reuse Strategies] certainly is an example of trying to create such standards, and push a community towards adopting that because there are mutual gains to be had if everybody designs in ways that allow reuse and compatibility.

My own opinion is that DARPA will not be able to drive that standards formation, certainly not in the commercial world. But what we can do is encourage the creation of those standards by the larger community by showing that, in certain cases and in certain domains, there are really large advantages to having those commercial standards. 

Back to top

IEEE Spectrum: What’s the roadmap for ERI going forward?

Mark Rosker: We started with a very large investment, we pushed a bunch of ideas out to the community, and we got a great reaction. We’re now sort of in year two, which is a really good time to take stock. We have a commitment to maintain at least five years in this process, and I probably shouldn’t speculate about what happens after five years. In any case, if we’re going to make midcourse changes, if we’re going to cover new areas that maybe we might have missed that we should have covered, now is a good time to be having that discussion and think about what those things should be. For example, in our second year, we had an increased focus on security, as well as on strengthening the manufacturing options that are available for specialized functions, like photonics or RF.

IEEE Spectrum: You began several new programs some months after the official launch, could you talk about those a bit?

Mark Rosker: At the launch in July, we had a day of workshops. And from those workshops, we took some of that community feedback and created what we call our Phase Two of programs. It was six additional programs that we’ve announced since November. Those haven’t kicked off yet, but they have been announced. There are six new efforts that are categorized around security, as well as a defense applications initiative and some manufacturing initiatives.

Back to top

IEEE Spectrum: Can you walk us through some of those new ones?

Mark Rosker: I can certainly tell you about what the program goals are.

I don’t think there’s any particular point to the order here. But first program is one called PIPES, which stands for Photonics in the Package for Extreme Scalability. And what this is really about is very-high-bandwidth optical signaling for digital interconnects. Photonic interconnects are something that everyone understands, but we’re really talking about driving very high bandwidth photonics all the way down to the package level.

IEEE Spectrum: Currently it stops at the rack level, right?

Mark Rosker: Exactly. Exactly. So, this would be useful for achieving sensationally high transfer rates all the way to the package.

[For some of the reasons why that hasn't yet been achieved commercially, see "Silicon Photonics Stumbles at the Last Meter," IEEE Spectrum, September 2018.]

Back to top

IEEE Spectrum: What’s next?

Mark Rosker: So the second program is called T-MUSIC, which stands for Technologies for Mixed-mode Ultra Scaled Integrated Circuits. [Hesitates.] I always have to check, because once you come up with the acronym no one ever remembers what it stands for. This is a program that is really focused on trying to develop very integrated and very broadband RF electronics. It’s combining silicon CMOS with silicon germanium technologies to get to next-generation mixed mode devices. These are things that could probably be up to the terahertz in terms of performance. Clearly, this is very highly relevant to the Department of Defense. The DOD typically is asking for extremely high performance even by commercial standards. But what it also offers is a route to onshore manufacturing. That’s very important in this particular program.

The third program in this list is the program called GAPS, which stands for Guaranteed Architecture for Physical Security. Again, this is getting back to the physical security part of the problem. Really what you’re talking about doing here is taking architectures that can be provably separated and provably shown to be secure. So it’s hardware components and interfaces, co-designed tools, and integration of the tools into systems that can be validated.

IEEE Spectrum: I’m going to need a little unpacking for that. What do you mean provably separate, provably secure? I’m not sure what’s being separated from what.

Mark Rosker: So to explain this, I want you to imagine that you have multiple tasks that you would like to do and that you want to ensure that one task does not talk to another task or that someone who is supposed to be getting information from one task doesn’t receive information that’s related to the other task. Ultimately, these could be things that could be at a different level of security from each other, or simply they may be—in the commercial world—they may be simply tasks that you want to make sure are kept separate. That is a significant problem in the DOD and government space.

IEEE Spectrum: And this is at the level of computer architecture?

Mark Rosker: Yup.

IEEE Spectrum: Is that what you’re talking about? This sounds a little bit like a response to Spectre and Meltdown in a way—information bleeding from one process to another due to an architecture issue.

Mark Rosker: I think that is certainly within the scope of the kinds of things that we’re interested in looking at.

The fourth program is called DRBE. We got a little bit creative with the acronymship, it’s Digital RF Battlefield Emulator. This is really quite interesting, because we’re using a problem that is of interest to the Department of Defense to serve as something that drives high performance computing in a larger way: high fidelity emulation of RF environments. If you were, for example, in downtown Chicago, and you had a large number of emitters around you—cell phone towers, just all the things that you’ll find in a city—trying to understand how that RF environment works is an immense computational problem.

IEEE Spectrum: Obviously, since you’re working on it I think I know the answer to this, but that’s not something that AT&T or Verizon can currently do? I mean, they can’t just stand in the space and get a complete picture of the RF environment?

Mark Rosker: Actually, it’s not anything that anyone can do. It depends on the level of fidelity at which you’re trying to simulate, of course. You can do an emulation of a system with a spreadsheet. But if you ask for a complex model that models what’s going on with a large number of emitters and a large number of what’s called multipaths, the problem grows geometrically. If I take a very small number—say, 10—it’s easy to do that. But if I take a very large number like the number of people in an urban environment, not really. No one can do that.

I’m being glib here because I’m saying number of people or number of emitters, but I also have to worry about the number of paths. It’s a multipath problem. And so that problem becomes very—it becomes intractable, actually.

IEEE Spectrum: What are some other new programs?

Mark Rosker: These are very new. One is called Real-Time Machine Learning, RTML. It probably sounds like what it is. It’s trying to reduce the design costs of developing AI or machine learning by developing ways to automatically generate the chip designs for machine learning. Really, I guess what you would say is that RTML is about making a machine learning compiler. If you could do that, it would be enormously important in terms of reducing the cost of building—I guess you could call it—a machine learning processor.

IEEE Spectrum: And is this aimed at the inferencing or training chips?

Mark Rosker: The training kind. This is basically the tensor processor and Pytorches of the world.

IEEE Spectrum: The ERI already has a hardware compiler component through the IDEA program right? 

Mark Rosker: Right, but there is no machine learning compiler that exists. It’s a completely separate problem. So this would be a first of its kind. The hardware compiler technology under development through POSH and IDEA, those programs are more traditional Von Neumann-type generalized processing.

IEEE Spectrum: There any other programs you want to talk about?

Mark Rosker: There’s one more that I haven’t mentioned and we call it AISS, Automatic Implementation of Secure Silicon. And this is a design program. It is run by [DARPA program manager] Serge Leef, and, basically, what it is about is creating an augmented chip design flow that is consistent with security mechanisms.

IEEE Spectrum: How does this differ from the other automated design programs that you’re already working on through POSH and IDEA?

Mark Rosker: POSH and IDEA are really about trying to deal with complexity. This is about secure silicon. How do you make a design which provides a way of evaluating and making sure you have achieved some security metric?

IEEE Spectrum: Security is always a moving target. What sort of things are going to have to be guarded against, by design? Or have you decided what those things are?

Mark Rosker: You’re right; in the security space you have to define the problem. AISS is specifically dealing with four threat vectors: side channel attacks, Trojan insertion, reverse engineering, and supply chain attacks such as cloning and counterfeiting.

IEEE Spectrum: Sort of like the GAPS program, but with automated design?

Mark Rosker: Yes. It is in that space between the two.

IEEE Spectrum: What’s your ideal outcome from the symposium in July?

Mark Rosker: I think, for us, the summit is all about engagement with the larger community. I think we have been very successful in the first year to attract the attention of a number of companies, ones we call non-traditional performers, [by which we mean] people who have not traditionally answered our call for responding to new ideas.

What I think we want to do moving forward is to couple better with those people and those communities and some of the more traditional performers that we have who work on problems.

But, again, we, at DARPA are always mindful that we’re a part of the Department of Defense. Ultimately, those improvements and capabilities that we develop, we want to see realized in applications that are important and disruptive for the Department of Defense.

So the ideal outcome is engagement. Not just between us and different communities, but between traditional and non-traditional performer communities. Having them together and talking to each other. And, hopefully, working with each other in ERI as we move forward.

IEEE Spectrum: Any fiscal year 2019 budget information you can share for ERI?

Mark Rosker: Well, I don’t think we announced the budget to the dollar. We committed to at least $1.5 billion over 5 years, and we are absolutely going to deliver on that.

Back to top

The Conversation (0)