Last August, IEEE Spectrum ran a feature article by researchers from the University of Michigan at Ann Arbor and ARM Holdings in Cambridge, England, who reported their work aimed at marshaling all of a microprocessor’s abilities, leaving hardly any reserve. They discussed sophisticated fault-monitoring techniques that allow chips to operate close to the point at which performance-harming timing errors start to crop up. Computer makers, they said, would soon be able to skirt the razor’s edge of chip reliability by correcting for the occasional error while overclocking a chip to boost processing speed or while running it on much less power in order to gain more energy efficiency.
On 9 February, the Michigan-ARM team stepped forward with a game-changing announcement. The researchers presented a paper at the International Solid State circuits conference (ISScc) reporting that they used fault monitoring and a group of complementary energy-saving techniques--such as shutting off the clock signal in the regions of the chip that aren’t crunching numbers--to maintain the performance and reliability of a 1-GHz chip running on 52 percent less power than it’s rated for.
Willie Jones is an associate editor at IEEE Spectrum. In addition to editing and planning daily coverage, he manages several of Spectrum's newsletters and contributes regularly to the monthly Big Picture section that appears in the print edition.