A Pinch of Salt Completes the Recipe for 2-D Materials in Supercapacitors

A low-cost technique offers purer transitional metal oxides for supercapacitor electrodes

3 min read
A Pinch of Salt Completes the Recipe for 2-D Materials in Supercapacitors
Image: Nature Communications

In joint research involving Drexel University in Philadelphia, and Huazhong University of Science and Technology (HUST) and Tsinghua University, both in China, scientists have found a way to formulate two-dimensional materials that are purer and have surface areas much closer to their theoretical maximum. The expected benefit: supercapacitors that store energy far better than ever. How did they do it? It turns out that they just needed to add a pinch of salt to coax the best out of them.

In research described in the journal Nature Communications, the international team used the surface of salt crystals to serve as growth templates for transitional metal oxides. That new ingredient, say the researchers, makes the final product bake up bigger and better. 

"The challenge of producing a metal oxide that reaches theoretical performance values is that the methods for making it inherently limit its size and often foul its chemical purity, which makes it fall short of predicted energy storage performance," said Jun Zhou, a professor at HUST's Wuhan National Laboratory, in a press release. “Our research reveals a way to grow stable oxide sheets with less fouling that are on the order of several hundreds of times larger than the ones that are currently being fabricated."

While the name of the game for storage capacity in supercapacitors may be electrode surface area, it’s important to make a distinction between the theoretical surface area of a material and its practical one.

There in lies the rub for the wonder material graphene, for instance. The hope has been that graphene’s enormous theoretical surface area of 2,630 square meters per gram would let it store an enormous number of ions if placed on the electrode of a supercapacitor. The reality is that a standalone sheet of graphene on the electrode of a supercapacitor will result in unacceptably low volumetric capacitance. Stacking layers of graphene counteracts that capacitance problem, but doing so sacrifices the wonderful theoretical surface area of graphene to the point that it doesn’t quite compete with crushed coconuts or even used cigarette filters.

The same tradeoff that has plagued graphene—practical realization never living up to their theoretical promise—has worked against metal oxides.

The researchers saw that at least part of the problem for metal oxides was that the production process—usually some kind of chemical vapor deposition—results in impurities that prevent ions from bonding with the material. The salt template approach they have developed eliminates many of these impurities and does so very cheaply.

“The nanometer-thin layers grow over a large area of cheap and recyclable salt, said Yury Gogotsi, a professor at Drexel, in an e-mail interview with IEEE Spectrum. “The method is scalable and potentially inexpensive, unlike most of other techniques for growing nanometer-thin oxides. Also, we can make ultrathin, truly 2-D, oxides that don’t naturally come in layered structures and cannot be produced by exfoliated layered precursors.”

Gogotsi also noted that the layers of metal oxides are not immune to the issues that affect graphene’s performance when it is layered on an electrode. But he reports that there exist techniques to overcome that limitation that are particularly attractive for metal oxides.

“This challenge exists with every 2-D material,” says Gogotsi.  “We can overcome this by combining different nanoparticles—known as ‘pillaring’—to sit between the 2-D layers.  Since most oxides have low electrical conductivity, they require a conductive carbon additive anyway, which can serve a dual role of spacer and conductor.”

Gogotsi is confident that the material will be durable for thousands of cycles, but the researchers are not ready to discuss final performance figures for a supercapacitor equipped with electrodes made from this material. That characterization, he says, “will be the next step of our research.”

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3D-Stacked CMOS Takes Moore’s Law to New Heights

When transistors can’t get any smaller, the only direction is up

10 min read
An image of stacked squares with yellow flat bars through them.
Emily Cooper

Perhaps the most far-reaching technological achievement over the last 50 years has been the steady march toward ever smaller transistors, fitting them more tightly together, and reducing their power consumption. And yet, ever since the two of us started our careers at Intel more than 20 years ago, we’ve been hearing the alarms that the descent into the infinitesimal was about to end. Yet year after year, brilliant new innovations continue to propel the semiconductor industry further.

Along this journey, we engineers had to change the transistor’s architecture as we continued to scale down area and power consumption while boosting performance. The “planar” transistor designs that took us through the last half of the 20th century gave way to 3D fin-shaped devices by the first half of the 2010s. Now, these too have an end date in sight, with a new gate-all-around (GAA) structure rolling into production soon. But we have to look even further ahead because our ability to scale down even this new transistor architecture, which we call RibbonFET, has its limits.

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