The boom in mobile devices and data centers has circuit designers racing to find new ways to slash power consumption. At this year’s International Solid-State Circuits Conference, in San Francisco, six power-saving technologies took center stage. Some will emerge in products this year, while others are just beginning to catch the interest of major chipmakers.
Academics have long toyed with the idea of operating chips at a point very close to the threshold voltage—the amount needed to switch a transistor on. Now the scheme seems to be getting picked up by industry. Intel researchers discussed a 32-nanometer, Pentium-class chip they’ve built that can operate from 1.2 volts—de rigueur for today’s processors—all the way down to 280 millivolts. The chip’s sweet spot for energy efficiency was 450 mV, just above the threshold voltage. At that level, Intel’s chip ran slowly, at less than 100 megahertz, but it also consumed just about a fifth of the energy it did at 1.2 V. Parallel processing could be used to pick up some of the slack in performance.
Engineers typically run chips at a higher voltage than needed in order to prevent clocking errors. If chips had a way to detect errors and change their operating voltage on the fly, engineers could push chips to operate at the lowest voltage possible, saving power in the process. The scheme, called Razor, is still largely stuck in academic circles. But researchers from the University of Michigan, in Ann Arbor, and Harvey Mudd College, in Claremont, Calif., showed that the approach works on an ARM Cortex-M3 processor, boosting energy efficiency by 60 percent. The team says it’s the first implementation of a Razor-style scheme on a complete commercial processor.
Intel has packed 1.4 billion 3-D transistors onto Ivy Bridge, its next-generation processor. The switch to less leaky 3-D transistors has given the new chip a big power boost. The 22-nm Ivy Bridge chips can be run just as fast as the company’s previous chips, but with an operating voltage that’s 200 mV lower. Intel has also incorporated designs at the circuit and core level to improve the chip’s power management. A separate system-on-a-chip code-named Silvermont, based on the same transistor-making process, will be geared for mobile handsets.
Phase-locked loops—which lock in and track an input signal—are vital circuit elements that are used to sync modern processors to their clocks and pick up and transmit radio signals. In the past, these circuits were built with analog components, but all-digital variants consume a tenth of the power and are easier to fabricate. Mobile powerhouse Samsung presented a new improvement on the all-digital phase-locked loop, a 0.012-square-millimeter circuit that consumes just 2.5 mW. Intel showed off a version of the circuit, built with the company’s 22-nm technology, that consumes as little as 0.7 mW.
Another basic circuit headed for a low-power makeover is the switched capacitor, which is often used to convert analog signals to digital. A team at Oregon State University, in Corvallis, debuted a low-power component that was inspired by the ring oscillator, a common test circuit made of a loop of inverters. Another team at the National Chiao Tung University, in Hsinchu, Taiwan, found a way to save power by working on signals in two separate stages—one for crude processing and the other for fine-tuning—that can each be optimized.
Memory makers Samsung and Hynix Semiconductor both unveiled details on the next incarnation of synchronous DRAM, the memory that drives today’s processors. The new generation, which goes by the name DDR4, boasts circuit tricks that let Samsung drop the supply voltage to its memory modules from 1.5 V to 1.2 V. The modules also include better clocking and faster algorithms for encoding data to be sent to and fetched from memory. DDR4 may make its commercial debut as early as 2013.