Hynix Makes No-Capacitor DRAM

Z-RAM memory design might find a spot in the competitive DRAM market

Image: Innovative Silicon

Sideways Solution: Z-RAM works on ordinary silicon by turning the transistor vertically.

A Swiss company, working with memory chipmaker Hynix Semiconductor, has introduced a design that it says will be a cheaper, lower-power replacement for the common computer memory known as dynamic RAM, or DRAM.

Innovative Silicon, in Lausanne, says it has redesigned its zero-capacitor RAM, or Z-RAM, so that it can be built on the same kind of wafers used for ordinary DRAM. This is a big advance for the company, because its previous devices required expensive specialty wafers. Z-RAM, unlike DRAM, doesn’t require a capacitor, so the company estimates that the new design will be 25 to 30 percent cheaper as the critical features of memory drop below 40 nanometers over the next couple of years. What’s more, the Z-RAM cells operate at voltages as low as 0.5 to 0.6 volt, in line with what future DRAM devices will require.

Innovative Silicon has licensed its Z-RAM technology to South Korea’s Hynix, the No. 2 memory chip firm. Hynix built a test chip demonstrating the improvements and reported the results in June at the 2010 Symposium on VLSI Technology and Circuits, in Honolulu.

DRAM stores a bit of memory—a 1 or a 0—as charge on a capacitor. The problem is that DRAM makers have been cramming more memory onto less real estate, but the capacitors in a memory circuit can’t be shrunk as fast as the transistors. The reason? A capacitor must be big enough to hold a recognizable charge. ”Building the capacitor is becoming very challenging,” says Jeff Lewis, senior vice president for marketing and business development at Innovative Silicon. ”At 30 nm, people are pretty much running out of solutions to how to build them at all cost-effectively.”

Instead of a capacitor, Z-RAM relies on what’s called the floating-body effect. By building a transistor in a layer of silicon deposited atop silicon dioxide—an insulator—you electrically isolate the transistor. When current passes through the transistor, some electrons create electron-hole pairs. The transistor’s drain lets the extra electrons leave, but it traps the holes, resulting in a net positive charge. That ”floating” charge can be read as a 1. Increasing the voltage on the transistor gate empties the holes out through the source electrode, which can be read as a 0. With no capacitor needed, the bit cells only need to be the same size as the transistors, and those get smaller every year.

But building the device on a silicon-on-insulator wafer drove up the cost. Now the company has figured out a way to make memories on bulk silicon. Instead of building the transistor on top of an insulating layer, with the gate on top and the source and drain on the ends, Innovative Silicon aligns the transistor vertically so that the gates are on either side and the junctions are at the top and bottom. That provides the same isolation and the same floating-body effect. As a bonus, it fits in with the industry move toward a more 3-D transistor.

The vertical design, along with the new placement of the gates, also resulted in an operating voltage of 0.5 V, which the company says is 50 to 75 percent lower than any other floating-body memory device. The design therefore saves energy and makes the device compatible with existing power supplies, which keeps costs down, Lewis says. It also increases by a factor of 1000 the amount of time a cell can hold onto a bit amid the noise of other cells switching.

Innovative Silicon had originally envisioned using Z-RAM to replace static RAM, which is faster than DRAM and is integrated with the microprocessor. Because a Z-RAM cell is made up of only one transistor versus an SRAM’s six, it can hold five times as many bits on the same area of silicon. Lewis says that the silicon-on-insulator market, necessary for the SRAM replacement design, never materialized, and that the need for a DRAM replacement has become more acute. Now, he says, ”our focus is stand-alone DRAM only.”

Lewis says the capabilities of Z-RAM match the demands outlined in the DRAM road map out to 2020. He expects Hynix to be making samples for testing in commercial devices within two years.

Other companies, such as Intel and Toshiba, are also pursuing floating-body memory.

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