Look Ma, No Wires

In Sun scheme, chips communicate with capacitors

12 November 2003—Everybody complains about the long wires on circuit boards that limit the speed of inter-chip communication. But, now engineers at Sun Microsystems Inc., (Santa Clara, Calif.) have done something about them. In fact, what they have done is to eliminate the need for them entirely.

Sun’s solution, presented 23 September at the IEEE Custom Integrated Circuits Conference (San Jose, Calif.), is to put the chips close enough to one another so that they can communicate directly, without using wires at all. Called proximity communication, the technique is the brainchild of Sun vice president Ivan E. Sutherland, best known for cofounding Evans and Sutherland, a groundbreaking computer graphics company, back in the late 1960s.

The technique, explains Robert Drost, a principal investigator on the project, relies on capacitive coupling. "When two conducting structures are close to one another, an electrical signal on one of them causes an electrical signal to appear on the other," he says.

So, in place of the conventional output pads to which wires would be bonded, the engineers built an array of small metal plates, 50 nm on a side, above the top wiring layer of a chip, covering the entire chip with a micrometer-thick protective layer called a scratch coating. Then they did the same thing with a second chip.

They then placed the two chips face to face so that the metal plates lined up, allowing the plates to communicate with their counterparts capacitively through two thicknesses of the scratch coating.

To use this approach in a system with many chips, says Drost, an upper array of chips, spaced slightly less than a chip-width apart, would overlay a bottom array. The two arrays would be offset so that each corner of a chip in the upper array overlaps a corner of four chips in the lower array [see figure]. In size, the capacitive plates are small enough so that all the plates needed for any one chip to communicate with another could be placed in one corner. "That allows you to build a two-dimensional system of arbitrary size," Drost explains.

The most obvious advantage to this approach is communications speed. Even though the prototype was built in an old silicon technology, with typical feature sizes of 350 nm (compared with today’s 100- and 130-nm designs), the two chips communicated at a data rate of 1.35 GHz per channel. "That’s a very good number for 350-nm circuits," says Drost. In current technologies, and for the foreseeable future, "there is no problem for per-channel data rates to exceed the clock speed of the chip."

Although capacitive coupling does not distort signals, it does attenuate them, adds Drost. So each receiving plate is equipped with a sense amplifier to bring signals back up to the required level.

Another advantage to proximity communication is that the scratch coating can be left intact, in contrast to conventional systems that require removing the scratch coating over the output pads, leaving them vulnerable to destruction by electrostatic discharge.

Current technology gets around this problem by adding protection circuits near the output pads to drain off the electric charge. These protection circuits have a lot of capacitance and it takes a lot of power to drive them, says Drost. But they can be eliminated with proximity communication. "We expect to see power reduced by about a factor of five."

A third advantage is that a faulty chip can easily be removed from the system and replaced with a good one, since there are no input or output wires to unsolder. In conventional circuit boards, it is usually easier and more cost effective to replace an entire board than it is to unsolder a bad chip.

No plans are yet in place to commercialize the technology. Sun is developing the technique under a contract with the U.S. Defense Advanced Research Projects Agency.

More than one company is seeking ways to speed up interchip communications. In August 2002 Infineon Technologies AG announced a new method of connecting stacked ICs in 3-D packages, says Reiner Schönrock, the company’s technology communications director. Like Sun’s capacitive coupling technique, the Infineon approach uses small copper pads on the tops of the chips and puts them face to face in the package. The difference is that Infineon’s technique bonds the pads together with a thin layer of solder, making a direct electrical connection between the two chips rather than a capacitive one. Schönrock tells Spectrum that the first wafers to use this technology are being processed now with the first products expected in 2004.

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