Nanomaterials Enable Smaller Chip Packaging

Smoltek's chip packaging process
Image: Smoltek
Smoltek's chip packaging process

Overwhelmingly, the focus for applying nanomaterials to electronics has been to meet the demands of Moore’s Law by continuing the seemingly inexorable shrinking of transistor dimensions.

While there have been some remarkable achievements in that regard—among them, getting dimensions down as low as 1 nanometer in the laboratory—the drive towards putting systems on chips (SoC) and systems in packages (SiP) is causing a shift in focus from smaller transistors to smaller packaging. This shift appears to be opening up a new use for nanomaterials that could expand the focus of nanomaterials in chip manufacturing.

The Swedish company Smoltek AB, a spinout from Chalmers University, sees chip packaging as the new frontier in nanoelectronics. It has been positioning itself at the forefront of this new movement over the last five years with its development of a variation on chemical vapor deposition (CVD) technology it has dubbed SMOLTEK TigerTM.

In CVD processes for carbon nanostructure fabrication, gaseous reactants, or catalysts, are introduced into a furnace to form a film on a metal substrate that’s usually made of copper. By varying process parameters such as the amounts of the materials and when they are introduced, it’s possible to engineer how the nanostructures grow.

The key to making CVD work for carbon nanostructure fabrication is the ability to precisely control the location and density of the resulting growth – from dense film to exactly located individual nanostructures. It’s in this area that Smoltek has focused its business and secured its patent protection.

Smoltek’s CVD process differs from other similar processes in the addition of an additional control layer apart from the catalyst layer; this new layer controls the growth of the nanostructures. Smoltek also adds another layer, dubbed a “help layer,” that prevents the bottom surface where the active and passive devices are located from being damaged during the growth process.

The key benefit of this novel approach to CVD is that it works at temperatures below 400 °C, making it compliant with complementary metal-oxide semiconductor (CMOS) materials and processes, says Anders Johansson, CEO of Smoltek. 

You can see Johansson describe the company and the technology in the video below.

While nanomaterials provide disruptive properties such as the ability to carry extreme current densities, or excellent thermal conductivity, traditional materials have been stretched to meet these greater demands, limiting interest from the chip industry in using nanomaterial alternatives. Johannson is now seeing a change in the marketplace.

“We see this resistance changing rapidly now,” said Johansson, in an e-mail interview with IEEE Spectrum. “Eventually several “red brick walls” are approaching [performance and/or cost] and the interest in Smoltek’s technology has increased rapidly over the last 18-month period.”

One of the “red brick walls” that Johansson is no doubt referring to is the demand to keep doubling the number of transistors. Silicon is not going to make it far past 2020, and even nanomaterials within CMOS are not going to keep it going for much beyond that.

Instead there has been a movement within the semiconductor industry to start using the real estate freed up on the chips brought on by the decreasing chip dimensions to add features onto them—the so-called SiPs and SoCs. It is within this shift in electronics that Smoltek sees its opportunity.

“Initially we see our technology providing opportunities to the “advanced packaging space” for products utilizing SiP level integrated circuits,” said Johansson. “Compared to products based on traditional technology, devices produced with our process will provide higher performance at significantly reduced size and energy consumption.”

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Nanoclast

IEEE Spectrum’s nanotechnology blog, featuring news and analysis about the development, applications, and future of science and technology at the nanoscale.

 
Editor
Dexter Johnson
Madrid, Spain
 
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