illustration: sean mccabe; original photo: timothy archibald

From left, Pierre Fazan, cofounder; Mark-Eric Jones, CEO; and Serguei Okhonin, cofounder of Innovative Silicon

The running joke at Innovative Silicon, a four-year-old Swiss firm on the shores of Lake Geneva, is that state-of-the-art microprocessor chips shouldn’t be thought of as logic chips with embedded memory. Rather, they should be called memory chips with embedded logic.

Yes, the joke is so geeky it hurts. But it conveys more than a little truth—and that’s pretty painful, too. On-chip memory already takes up more than 50 percent of the surface area of any respectable microprocessor. It’s expected to occupy a whopping 83 percent of the area of high-end processors made in 2008, and 90 percent by 2011. And that’s no joke for designers who will be hard-pressed to cram in hundreds of megabytes of memory without making their chips any bigger.

That’s why Innovative Silicon, which is essentially an intellectual property firm, may have the last laugh. The company, which is in Lausanne, has developed what it says is the densest—and cheapest—embedded memory technology in the world. It’s called Z-RAM, for zero-capacitor dynamic random access memory, and if it grabs even a little piece of the on-chip memory market, it will change the ground rules for microprocessor design and quickly make Innovative Silicon a company to be reckoned with.

The semiconductor industry is absolutely awash with innovative memory technologies that were supposed to conquer the world but didn’t. What’s so great about Z‑RAM? Basically, it does not require any new materials or extra processing steps in the fabrication process, says Pierre Fazan, one of the founders of Innovative Silicon and its chairman and chief technology officer.

That’s extremely important to chip makers, who are reluctant to add any new materials to their already complex and delicate processes, for fear of how the additions may erode the proportion of working chips that emerge from their fabrication runs. Extra processing steps, too, are anathema, because they increase costs, often greatly.

That’s the beauty of Z-RAM: no exotic semiconductors, no oddly structured parts, and no experimental insulators. Each memory cell is just a single transistor. That’s it. For comparison, conventional on-chip memories typically use six transistors per memory cell. So you can fit as much as 5 megabytes of Z-RAM into the space occupied by a single megabyte of conventional embedded memory. That lets you greatly increase the amount of memory on the chip and thereby improve its performance, make the chip a lot smaller and cheaper, or do a good deal of both. Even engineers outside of Innovative Silicon acknowledge the idea’s appeal. “It is an elegant technology,” says Subramanian S. Iyer, an embedded-memory specialist at IBM.

“The transistor is the most studied device in the world,” says Serguei Okhonin, Innovative Silicon’s other founder and its chief scientist. “To make it work as a memory, we had to find something different.” What they found was a way to temporarily store a bit as charge inside the body of a transistor made on a silicon-on-insulator (SOI) semiconductor wafer. Such wafers are gaining ground as the substrate for high-performance processors, such as the Cell microprocessor and Advanced Micro Devices’ Opteron.

In 2000, Okhonin and Fazan, then at the École Polytechnique Fédérale de Lausanne, were researchers in one of just two groups to successfully create this type of memory, termed a floating-body cell. But since then, several large chip makers—notably Toshiba Corp. and Renesas Technology Corp., both in Tokyo—have followed suit.

Nevertheless, Okhonin and Fazan pulled way ahead of the pack last year by bagging one of the biggest fish in the microprocessor pond: Advanced Micro Devices (AMD), in Sunnyvale, Calif. The US $5.8-billion-per-year company contracted to purchase a license for possible integration of Z-RAM into future processors. “AMD is considering this technology for our highest-end microprocessors,” Craig Sander, AMD’s vice president of process technology and development, said in an interview. “However, we do believe if successful at that, we could see this migrate down to lower-cost versions as well.”

Meanwhile, with Toshiba nipping at its heels with a similar type of fast, compact embedded memory, Innovative Silicon isn’t standing still. Just weeks ago, it unveiled a radical new version of Z-RAM that will send the competition back to the laboratory.

Z-RAM is a technology that straddles two great industry imperatives: ever more on‑chip memory and transistors that operate faster and consume less power.

Increasingly, for makers of microprocessors (with the notable exception of Intel), gains in speed and efficiency are coming from the use of SOI wafers, which serve as the foundation on which a device is fabricated. Although SOI wafers are still a small fraction of semiconductor wafers sold, their shipments doubled in 2006 to 22 000 square meters and are expected to reach 39 000 square meters in 2008.

An SOI wafer differs from an ordinary silicon wafer in that it has a very thin layer of insulating silicon dioxide buried a few hundred nanometers or less below the surface. That layer of insulation cuts the transistor off from the vast bulk of the wafer—which, in turn, limits the amount of charge the transistor must move in order to switch on or off.

The result is to speed up circuits by as much as 30 percent, Fazan says. As transistors shrink, they increasingly leak current, even when they are turned off. But the insulation in SOI wafers blocks a major pathway for that current, thus reducing the power that transistors draw by 30 ­percent when they’re switching and 50 percent to 90 percent when they’re not.

But those advantages come at a cost. A 200-millimeter SOI wafer sells for about $275, while a plain silicon wafer of the same size goes for $65. Mark-Eric Jones, Innovative Silicon’s president and CEO, points out that as a percentage of total cost, the price gap collapses considerably once you factor in the $2400 in processing needed to turn a blank wafer of either substrate into a repeating mosaic of microchips. Still, all things being equal, the SOI chip will cost almost 9 ­percent more than the bulk-silicon chip.

But all things are no longer equal. The SOI wafer lets you substitute Z-RAM for the chip’s conventional embedded memory. SOI’s insulating layer is key to storing the bit in Z-RAM, so you cannot build it on a plain wafer. By Innovative Silicon’s estimates, if the conventional memory takes up half the area, replacing it with Z-RAM would let designers shrink a chip to 72 square milli­meters from 120 mm2. That would boost the number of chips per wafer and cut the final cost of the chip almost in half. Suddenly, SOI looks like a bargain.