The modern microprocessor is one of the premier markers of technological achievement. And rightly so. But if a billion transistors on a postage-stamp-size chip impress you, consider the fabrication facilities that put them there. And not just on one chip, but on hundreds of them on dinner-plate-size wafers, which move by the thousands through the manufacturing line 24 hours a day, 365 days a year.
In a single day, a state-of-the-art fab can make nearly 100 trillion transistors, roughly 250 times the number of stars in the Milky Way galaxy. Such facilities are by any standard the most complex, and, at an average cost of US $3 billion to build and equip, the most costly factories ever built by humankind.
Their sheer scale astounds—one of Intel’s current-generation semiconductor fabs scatters nearly a thousand multimillion-dollar machines in an area more than twice the size of a regulation soccer field. These machines perform more than 500 different steps to make a chip, and they do it around the clock. That adds up to a mind-boggling 10 million processing steps in each fab every week.
If you think that’s too much for mere human beings to handle, you’re right. Increasingly, it’s software, rather than bunny-suited people, that produces chips. In fact, our ability at Intel to beat our competitors to market with new technology depends enormously on the software we use to test, adjust, and perfect the manufacturing processes in our fabs.
Today’s state-of-the-art fabs produce chips on 300-millimeter-diameter wafers [see ” Special Delivery”]. By our count, there are 43 commercial 300-mm fabs in production as this issue goes to press, with perhaps a dozen more slated to come online by year-end. Some are more automated than others, but most 300-mm fabs have at least a material-handling system that uses software-controlled robots and monorails to transport wafers to the myriad tools needed to make chips—etching chambers, wafer polishers, photolithographic steppers, and the like. Most IC makers also buy or write manufacturing software that tracks wafers through the fab, scheduling software that sends wafers to the right tools at the right time, and process-control systems to manage the chip-making recipes—the mix of gases, chemicals, metals, and semiconductors that constitute each chip.
The software suite that we write and manage, dubbed Automated Manufacturing Technology, or AMT, monitors and controls the hundreds of steps wafers must pass through on their way to becoming Pentium, Itanium, and Core 2 Duo processors, as well as other high-end Intel microprocessors. This software makes it possible to run a 300â''mm factory with far fewer people than we needed to run our older 200-mm fabs. These days people venture out onto the fab floor only to attend to machines that the software system has sensed need repairs or routine maintenance.
AMT also plays a crucial role in Intel’s multibillion-dollar-a-year R&D operations. Researchers use the technology development manufacturing line installed in our fab in Hillsboro, Ore., to create and hone the manufacturing processes for all of Intel’s fabs. The procedures and recipes we concoct there for next-generation chips will be copied exactly at one or more of the company’s five (soon seven) 300-mm fabs. That development line takes advantage of the same hardware and software capabilities as the manufacturing lines that are producing Pentium and Core 2 Duo and Quad processors alongside it in our Hillsboro fab. This line also tests out new machines and software routines that are being specifically developed and tuned for future generations of chips.
This close coupling of our development operations and manufacturing allows us to stay on the approximate two-year cycle defined by Moore’s Law. The current-generation process, which we launched in 2005, produces chips in which the minimum half-pitch—half the distance, center to center—between two wires can be as small as 65 nanometers. By the end of 2006, we had already shipped 70 million microprocessors produced by our 65â''nm process. In January of this year, we completed the development of the next generation of chip-making technology, which by the second half of this year will be knocking out chips in the 45-nm process. We are also well into developing 32-nm processes, to be unveiled in 2009.